PIC24FJ64GA310 datasheet(2/406 Pages) MICROCHIP

2 / 406 page

PIC24FJ128GA310 FAMILY

DS39996F-page 2

 2010-2011 Microchip Technology Inc.

High-Performance CPU:

• Modified Harvard Architecture

• Up to 16 MIPS Operation @ 32 MHz

• 8 MHz Internal Oscillator:

- 4x PLL option

- Multiple clock divide options

- Fast start-up

• 17-Bit x 17-Bit Single-Cycle Hardware

Fractional/Integer Multiplier

• 32-Bit by 16-Bit Hardware Divider

• 16 x 16-Bit Working Register Array

• C Compiler Optimized Instruction Set Architecture

• Two Address Generation Units for Separate Read

and Write Addressing of Data Memory

Special Microcontroller Features:

• Operating Voltage Range of 2.0V to 3.6V

• Two On-Chip Voltage Regulators (1.8V and 1.2V) for

Regular and Extreme Low-Power Operation

• 20,000 Erase/Write Cycle Endurance Flash Program

Memory, typical

• Flash Data Retention: 20 Years Minimum

• Self-Programmable under Software Control

• Programmable Reference Clock Output

• In-Circuit Serial Programming™ (ICSP™) and

In-Circuit Emulation (ICE) via 2 Pins

• JTAG Boundary Scan Support

• Fail-Safe Clock Monitor Operation:

- Detects clock failure and switches to on-chip,

low-power RC oscillator

• Power-on Reset (POR), Power-up Timer (PWRT)

and Oscillator Start-up Timer (OST)

• Brown-out Reset (BOR) with Operation below VBOR

• Low-Voltage Detect (LVD)

• Flexible Watchdog Timer (WDT) with its own

RC Oscillator for Reliable Operation

• Standard and Ultra Low-Power Watchdog Timers

(WDT) for Reliable Operation in Standard and Deep

Sleep modes

PIC24FJ64GA310 Datasheet(PDF) 2 Page - Microchip Technology