PIC24FJ64GA310 datasheet(80/406 Pages) MICROCHIP

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PIC24FJ128GA310 FAMILY

DS39996F-page 80

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DMACHn: DMA CHANNEL n CONTROL REGISTER

U-0

r-0

R/W-0

—

—NULLW

RELOAD(1)

CHREQ(3)

bit 15

bit 8

R/W-0

SAMODE1

SAMODE0

DAMODE1

DAMODE0

TRMODE1

TRMODE0

SIZE

CHEN

bit 7

bit 0

Legend:

r = Reserved bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-12

Unimplemented:

Read as ‘0’

bit 12

Reserved:

Maintain as ‘0’

bit 11

Unimplemented:

Read as ‘0’

bit 10

NULLW:

Null Write Mode bit

= A dummy write is initiated to DMASRC for every write to DMADST

= No dummy write is initiated

bit 9

RELOAD:

Address and Count Reload bit(1)

= DMASRC, DMADST, and DMACNT registers are reloaded to their previous values upon the start

of the next operation

= DMASRC, DMADST and DMACNT are not reloaded on the start of the next operation(2)

bit 8

CHREQ:

DMA Channel Software Request bit(3)

= A DMA request is initiated by software; automatically cleared upon completion of a DMA transfer

= No DMA request is pending

bit 7-6

SAMODE<1:0>:

Source Address Mode Selection bits

= DMASRC is used in Peripheral Indirect Addressing and remains unchanged

= DMASRC is decremented based on SIZE bit after a transfer completion

= DMASRC is incremented based on SIZE bit after a transfer completion

= DMASRC remains unchanged after a transfer completion

bit 5-4

DAMODE<1:0>:

Destination Address Mode Selection bits

= DMADST is used in Peripheral Indirect Addressing and remains unchanged

= DMADST is decremented based on SIZE bit after a transfer completion

= DMADST is incremented based on SIZE bit after a transfer completion

= DMADST remains unchanged after a transfer completion

bit 3-2

TRMODE<1:0>:

Transfer Mode Selection bits

= Repeated Continuous

= Continuous

= Repeated One-Shot

= One-Shot

bit 1

SIZE:

Data Size Selection bit

= Byte (8-bit)

= Word (16-bit)

bit 0

CHEN:

DMA Channel Enable bit

= The corresponding channel is enabled

= The corresponding channel is disabled

Note 1:

Only the original DMACNT is required to be stored to recover the original DMASRC and DMADST.

DMASRC, DMADST and DMACNT are always reloaded in Repeated mode transfers (DMACHn<2> = 1),

regardless of the state of the RELOAD bit.

The number of transfers executed while CHREQ is set depends on the configuration of TRMODE<1:0>.

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