PIC24FJ64GA310 datasheet(92/406 Pages) MICROCHIP

92 / 406 page

PIC24FJ128GA310 FAMILY

DS39996F-page 92

 2010-2011 Microchip Technology Inc.

RCON2: RESET AND SYSTEM CONTROL REGISTER 2

U-0

—

bit 15

bit 8

U-0

r-0

R/CO-1

R/CO-0

—

VDDBOR(1) VDDPOR(1,2) VBPOR(1,3)

VBAT(1)

bit 7

bit 0

Legend:

CO = Clearable Only bit

r = Reserved bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-5

Unimplemented:

Read as ‘0’

bit 4

Reserved:

Maintain as ‘0’

bit 3

VDDBOR:

VDD Brown-out Reset Flag bit(1)

=A VDD Brown-out Reset has occurred (set by hardware)

=A VDD Brown-out Reset has not occurred

bit 2

VDDPOR:

VDD Power-On Reset Flag bit(1,2)

=A VDD Power-up Reset has occurred (set by hardware)

=A VDD Power-up Reset has not occurred

bit 1

VBPOR:

VBPOR Flag bit(1,3)

=A VBAT POR has occurred (no battery connected to VBAT pin, or VBAT power below Deep Sleep

Semaphore retention level, set by hardware)

=A VBAT POR has not occurred

bit 0

VBAT:

VBAT Flag bit(1)

= A POR exit has occurred while power was applied to VBAT pin (set by hardware)

= A POR exit from VBAT has not occurred

Note 1:

This bit is set in hardware only; it can only be cleared in software.

Indicates a VDD POR. Setting the POR bit (RCON<0>) indicates a VCORE POR.

This bit is set when the device is originally powered up, even if power is present on VBAT.

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