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PIC24FJ64GA310 Datasheet(PDF) 13 Page - Microchip Technology |
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PIC24FJ64GA310 Datasheet(HTML) 13 Page - Microchip Technology |
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13 / 406 page ![]() 2010-2011 Microchip Technology Inc. DS39996F-page 13 PIC24FJ128GA310 FAMILY TABLE 1-1: DEVICE FEATURES FOR THE PIC24FJ128GA310 FAMILY: 64-PIN Features PIC24FJ64GA306 PIC24FJ128GA306 Operating Frequency DC – 32 MHz Program Memory (bytes) 64K 128K Program Memory (instructions) 22,016 44,032 Data Memory (bytes) 8K Interrupt Sources (soft vectors/ NMI traps) 65 (61/4) I/O Ports Ports B, C, D, E, F, G Total I/O Pins 53 Remappable Pins 30 (29 I/O, 1 Input only) Timers: Total Number (16-bit) 5(1) 32-Bit (from paired 16-bit timers) 2 Input Capture Channels 7(1) Output Compare/PWM Channels 7(1) Input Change Notification Interrupt 52 Serial Communications: UART 4(1) SPI (3-wire/4-wire) 2(1) I2C™ 2 Digital Signal Modulator Yes Parallel Communications (EPMP/PSP) Yes JTAG Boundary Scan Yes 12/10-Bit Analog-to-Digital Converter (A/D) Module (input channels) 16 Analog Comparators 3 CTMU Interface Yes LCD Controller (available pixels) 240 (30 SEG x 8 COM) Resets (and Delays) Core POR, VDD POR, VBAT POR,BOR, RESET Instruction, MCLR, WDT; Illegal Opcode, REPEAT Instruction, Hardware Traps, Configuration Word Mismatch (OST, PLL Lock) Instruction Set 76 Base Instructions, Multiple Addressing Mode Variations Packages 64-Pin TQFP and QFN Note 1: Peripherals are accessible through remappable pins. |
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