HD6417618A datasheet(296/646 Pages) RENESAS

296 / 646 page

Section 12 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev. 6.00 Jun. 12, 2007 Page 264 of 610

REJ09B0131-0600

12.2.4

Transmit Descriptor List Address Register (TDLAR)

TDLAR is a 32-bit readable/writable register that specifies the start address of the transmit

descriptor list. Descriptors have a boundary configuration in accordance with the descriptor length

indicated by the DL bit in EDMR. This register must not be written to during transmission.

Modifications to this register should only be made while transmission is disabled by the TR bit

(

= 0) in the E-DMAC transmit request register (EDTRR).

Bit

Bit Name

Initial

value

R/W

Description

31 to 0

TDLA31 to

TDLA0

All 0

R/W

Transmit Descriptor Start Address

The lower bits are set as follows according to the

specified descriptor length.

16-byte boundary: TDLA3 to TDLA0 = 0000

32-byte boundary: TDLA4 to TDLA0 = 00000

64-byte boundary: TDLA5 to TDLA0 = 000000

12.2.5

Receive Descriptor List Address Register (RDLAR)

RDLAR is a 32-bit readable/writable register that specifies the start address of the receive

descriptor list. Descriptors have a boundary configuration in accordance with the descriptor length

indicated by the DL bit in EDMR. This register must not be written to during reception.

Modifications to this register should only be made while reception is disabled by the RR bit (

= 0)

in the E-DMAC Receive Request Register (EDRRR).

Bit

Bit Name

Initial

value

R/W

Description

31 to 0

RDLA31 to

RDLA0

All 0

R/W

Receive Descriptor Start Address

The lower bits are set as follows according to the

specified descriptor length.

16-byte boundary: RDLA3 to RDLA0 = 0000

32-byte boundary: RDLA4 to RDLA0 = 00000

64-byte boundary: RDLA5 to RDLA0 = 000000

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