HD6417618A datasheet(453/646 Pages) RENESAS

453 / 646 page

Section 15 Host Interface (HIF)

Rev. 6.00 Jun. 12, 2007 Page 421 of 610

REJ09B0131-0600

LSI

Status

Reset State by

RES Pin

Reset Canceled by

RES Pin

HIFMD

input

level

High

(Boot setting)

Low

(Non-boot setting)

High

(After the reset

canceled by boot

setting)

Low

(After the reset canceled by

non-boot setting)

HIFEBL

input

level

Low

High

The HIFEBL pin is

a general input

port and the HIF is

not controlled by

the signal input on

this pin.

Low

High

General input port at the initial

state *

HIFWR

input

control

Input

buffer:

Off

Input

buffer:

Off

General input port

Input

buffer:

Off

Input

buffer:

General input port at the initial

state*

HIFRD

input

control

Input

buffer:

Off

Input

buffer:

Off

General input port

Input

buffer:

Off

Input

buffer:

General input port at the initial

state*

Notes: 1. The pin also functions as an HIFEBL pin by setting the PFC registers.

2. The pin also functions as an HIF pin by setting the PFC registers.

When the HIF pin function is selected for the HIFEBL pin and this pin by setting the PFC

registers, the input and/or output buffers are controlled according to the HIFEBL pin

state.

When the HIF pin function is not selected for the HIFEBL pin and is selected for this pin

by setting the PFC registers, the input and/or output buffers are always turned off. This

setting is prohibited.

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