AS7150 datasheet(136/159 Pages) AMSOSRAM

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AS7150

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DS001130 • v3-00 • 2026-Jan-26

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8.12.27

AOC_SAR_TRES register (Address 0x8A)

Table 121: AOC_SAR_TRES register

Addr: 0x8A

AOC_SAR_TRES

Bit

Bit name

Default

Access

Bit description

7:0

sar_thres

128

R/W

This is the AOC SAR threshold register

which is used for all subsamples. This 8-bit

significant bits of a 20-bit ADC reading for

the SAR algorithms to find the correct DAC

offset current setting to channel ambient light

via the integrated current DAC. Please refer

to chapter 7.6.4.3 for more information about

regarding the SAR AOC function.

8.12.28

MOD1_SEQ1_AOC_EN register (Address 0x8B)

Table 122: MOD1_SEQ1_AOC_EN register

Addr: 0x8B

MOD1_SEQ1_AOC_EN

Bit

Bit name

Default

Access

Bit description

7:0

mod1_seq1_aoc_en

R/W

This register enables the AOC function for

sequencer 1 and ADC modulator 1. Each bit of

the register represents one subsample whereas

the LSB is assigned to subsample 1 and the

MSB is assigned to subsample 8.

0000 0001: AOC subsample 1 enabled

0000 0010: AOC subsample 2 enabled

0000 0011: AOC subsample 1 and 2 enabled

…

1111 1111: AOC for all 8 subsamples enabled

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