8

LTC1662

Transfer Function

The transfer function for the LTC1662 is:

V

k

V

OUT IDEAL

REF









1024

where k is the decimal equivalent of the binary DAC input

Power-On Reset

The LTC1662 actively clears the outputs to zero scale

when power is first applied, making system initialization

consistent and repeatable.

Power Supply Sequencing

The voltage at REF (Pin 4) should be kept within the range

–0.3V

Ratings). Particular care should be taken during power

supply turn-on and turn-off sequences, when the voltage

A3 A2 A1

Control Code

A0 D9 D8 D7 D6 D5 D4 D3 D2 D1

X1 X0

D0

Input Code

Input Word

Don’t

Care

Table 1. DAC Control Functions

CONTROL

INPUT REGISTER

DAC REGISTER

POWER-DOWN STATUS

A3

A2

A1

A0

STATUS

STATUS

(SLEEP/WAKE)

COMMENTS

0000

No Change

No Update

No Change

No Operation. Power-Down Status Unchanged

(Part Stays In Wake or Sleep Mode)

0001

Load DAC A

No Update

No Change

Load Input Register A with Data. DAC Outputs

Unchanged. Power-Down Status Unchanged

0010

Load DAC B

No Update

No Change

Load Input Register B with Data. DAC Outputs

Unchanged. Power-Down Status Unchanged

1000

No Change

Update Outputs

Wake

Load Both DAC Regs with Existing Contents of Input

Regs. Outputs Update. Part Wakes Up

1001

Load DAC A

Update Outputs

Wake

Load Input Reg A. Load DAC Regs with New Contents

of Input Reg A and Existing Contents of Reg B. Outputs

Update. Part Wakes Up

1010

Load DAC B

Update Outputs

Wake

Load Input Reg B. Load DAC Regs with Existing Contents

of Input Reg A and New Contents of Reg B. Outputs

Update. Part Wakes Up

1101

No Change

No Update

Wake

Part Wakes Up. Input and DAC Regs Unchanged. DAC

Outputs Reflect Existing Contents of DAC Regs

1110

No Change

No Update

Sleep

Part Goes to Sleep. Input and DAC Regs Unchanged. DAC

Outputs Set to High Impedance State

1111

Load DACs A, B

Update Outputs

Wake

Load Both Input Regs. Load Both DAC Regs with New

with Same

Contents of Input Regs. Outputs Update. Part Wakes Up

10-Bit Code

Note: All control codes other than those shown are undefined and not subject to test.

OPERATIO

sequence the supplies, clamp the voltage at REF by

connecting a Schottky diode between Pin 4 (anode) and

Pin 6 (cathode).

Serial Interface

See Table 2. The 16-bit Input word consists of the 4-bit

Control code, the 10-bit Input code and two don’t-care bits.

Table 2. LTC1662 Input Word

After the Input word is loaded into the register (see Figure 1),

it is internally converted from serial to parallel format. The

parallel 10-bit-wide Input code data path is then buffered

by two latch registers.