R8CSLASH20 datasheet(240/501 Pages) RENESAS

240 / 501 page

R8C/20 Group, R8C/21 Group

14. Timers

Rev.2.00 Aug 27, 2008

Page 224 of 458

REJ09B0250-0200

i = 0 or 1, j = either A, B, C or D

NOTE:

1. After a count starts, the PWM period is stable.

Table 14.31

Complementary PWM Mode Specifications

Item

Specification

Count Sources

f1, f2, f4, f8, f32, fOCO40M

External signal input to the TRDCLK pin (valid edge selected by a program)

Set the TCK2 to TCK0 bits in the TRDCR1 register to the same value (same count

source) as the TCK2 to TCK0 bits in the TRDCR0 register.

Count Operations

Increment or decrement

The TRD0 and TRD1 registers are decremented with the compare match in the

TRD0 and TRDGRA0 registers during increment. The TRD1 register is set from

0000h to FFFFh during decrement, the TRD0 and TRD1 registers are incremented.

PWM Operations

PWM period: 1/fk × (m + 2 - p) × 2(1)

Dead time: p

Active level width of normal-phase: 1/fk × (m - n - p + 1) × 2

Active level width of counter-phase: 1/fk × (n + 1 - p) × 2

fk: Frequency of count source

m: Setting value in the TRDGRA0 register

n: Setting value in the TRDGRB0 register (PWM output 1)

Setting value in the TRDGRA1 register (PWM output 2)

Setting value in the TRDGRB1 register (PWM output 3)

p: Setting value in the TRD0 register

Count Start Condition

Write 1 (count starts) to the TSTART0 and TSTART1 bits in the TRDSTR register.

Count Stop Conditions

Write 0 (count stops) to the TSTART0 and TSTART1 bits in the TRDSTR register

when the CSEL0 bit in the TRDSTR register is set to 1.

(The PWM output pin holds output level before the count stops.)

Interrupt Request Generation

Timing

• Compare match (the content in the TRDi register matches with the content in the

TRDGRji register.)

• The TRD1 register undeflows

TRDIOA0 Pin Function

Programmable I/O port or TRDCLK (external clock) input

TRDIOB0 Pin Function

PWM output 1 normal-phase output

TRDIOD0 Pin Function

PWM output 1 counter-phase output

TRDIOA1 PIn Function

PWM output 2 normal-phase output

TRDIOC1 Pin Function

PWM output 2 counter-phase output

TRDIOB1 Pin Function

PWM output 3 normal-phase output

TRDIOD1 Pin Function

PWM output 3 counter-phase output

TRDIOC0 Pin Function

Output inversed every 1/2 period of PWM

INT0 Pin Function

Programmable I/O port, pulse output forced cutoff signal input or INT0 interrupt input

Read from Timer

The count value can be read by reading the TRDi register.

Write to Timer

The value can be written to the TRDi register.

Selection Functions

• Pulse output forced cutoff signal input (refer to 14.3.4 Pulse Output Forced

Cutoff

)

• The active level of normal-phase and counter-phase and initial output level

selected individually.

• Transfer timing from the buffer register selected

• A/D trigger generated

n + 1

Normal-phase

(When “L” is selected for the active level)

Counter-phase

m + 2 - p

n + 1 - p

m - p - n + 1

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