R8CSLASH20 datasheet(201/501 Pages) RENESAS

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R8C/20 Group, R8C/21 Group

14. Timers

Rev.2.00 Aug 27, 2008

Page 185 of 458

REJ09B0250-0200

i = 0 or 1, j = either A, B, C or D

Table 14.25

Output Compare Function Specifications

Item

Specification

Count Sources

f1, f2, f4, f8, f32, fOCO40M

External signal input to the TRDCLK pin (valid edge selected by a program)

Count Operations

Increment

Count Period

• When the CCLR2 to CCLR0 bits in the TRDCRi register are set to 000b (free-

running operation)

1/fk × 65536 fk: Frequency of count source

• The CCLR1 to CCLR0 bits in the TRDCRi register are set to 01b or 10b (set the

TRDi register to 0000h at the compare match in the TRDGRji register.)

Frequency of count source x (n + 1)

n: Setting value in the TRDGRji register

Waveform Output Timing

Compare match

Count Start Condition

Write 1 (count starts) to the TSTARTi bit in the TRDSTR register.

Count Stop Conditions

• Write 0 (count stops) to the TSTARTi bit in the TRDSTR register when the CSELi

bit in the TRDSTR register is set to 1.

The output compare output pin holds output level before the count stops.

• When the CSELi bit in the TRDSTR register is set to 0, the count stops at the

compare match in the TRDGRAi register.

The output compare output pin holds level after output change by the

compare match.

Interrupt Request Generation

Timing

• Compare match (the content in the TRDi register matches with the content in the

TRDGRji register.)

• TRDi register overflows

TRDIOA0 Pin Function

Programmable I/O port, output-compare output or TRDCLK (external clock) input

TRDIOB0, TRDIOC0, TRDIOD0,

TRDIOA1 to TRDIOD1 Pin

Functions

Programmable I/O port or output-compare output (select every pin)

INT0 Pin Function

Programmable I/O port, pulse output forced cutoff signal input or INT0 interrupt

input

Read from Timer

The count value can be read by reading the TRDi register.

Write to Timer

• When the SYNC bit in the TRDMR register is set to 0 (channels 0 and 1 operate

independently)

Data can be written to the TRDi register.

• When the SYNC bit in the TRDMR register is set to 1 (channels 0 and 1 operate

synchronously).

Data can be written to both the TRD0 and TRD1 registers by writing to the TRDi

Selection Functions

• Output-compare output pin selected

Either 1 pin or multiple pins of the TRDIOAi, TRDIOBi, TRDIOCi or TRDIODi pin.

• Output level at the compare match selected

“L” output, “H” output or output level inversed

• Initial output level selected

Set the level at period from the count start to the compare match.

• Timing to set the TRDi register to 0000h

Overflow or compare match in the TRDGRAi register

• Buffer operation (refer to 14.3.2 Buffer Operation)

• Synchronous operation (refer to 14.3.3 Synchronous Operation)

• Output pin in the TRDGRCi and TRDGRDi registers changed

The TRDGRCi register can be used as output control of the TRDIOAi pin and the

TRDGRDi register can be used as output control of the TRDIOBi pin.

• Pulse output forced cutoff signal input (refer to 14.3.4 Pulse Output Forced

Cutoff

)

• Timer RD can be used as the internal timer without output.

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