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STM32L4P5CE Datasheet(PDF) 249 Page - STMicroelectronics

Part # STM32L4P5CE
Description  Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
PDF  311 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L4P5CE Datasheet(HTML) 249 Page - STMicroelectronics

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DS12903 Rev 2
249/311
STM32L4P5xx
Electrical characteristics
277
Table 101. Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
3THCLK-0.5
3THCLK+1
ns
tv(NOE_NE)
FMC_NEx low to FMC_NOE low
0
1
tw(NOE)
FMC_NOE low time
2THCLK-0.5
2THCLK+1
th(NE_NOE)
FMC_NOE high to FMC_NE high hold time
THCLK
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
1
th(A_NOE)
Address hold time after FMC_NOE high
2THCLK-1
-
tsu(Data_NE)
Data to FMC_NEx high setup time
THCLK+14
-
tsu(Data_NOE)
Data to FMC_NOEx high setup time
14
-
th(Data_NOE)
Data hold time after FMC_NOE high
0
-
th(Data_NE)
Data hold time after FMC_NEx high
0
-
tv(NADV_NE)
FMC_NEx low to FMC_NADV low
-
0
tw(NADV)
FMC_NADV low time
-
THCLK+1.5
Table 102. Asynchronous non-multiplexed SRAM/PSRAM/NOR read-NWAIT
timings(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
8THCLK-0.5
8THCLK+1
ns
tw(NOE)
FMC_NWE low time
7THCLK-0.5
7THCLK+0.5
tw(NWAIT)
FMC_NWAIT low time
THCLK
-
tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high
5THCLK+12.5
-
th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid
4THCLK+12
-



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