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STM32L4P5CE Datasheet(PDF) 148 Page - STMicroelectronics |
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STM32L4P5CE Datasheet(HTML) 148 Page - STMicroelectronics |
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148 / 311 page ![]() Table 28. Consumption in Run and Low-power run modes, code with data processing running from Flash in dual bank, ART enable (Cache ON Prefetch OFF) and power supplied by external SMPS Symbol Parameter Conditions(1) TYP Unit - VDD12 fHCLK 25°C 55°C 85°C 105°C 125°C IDD(Run) Supply current in Run mode fHCLK = fHSE up to 48 MHz included, bypass mode PLL ON above 48 MHz all peripherals disable VDD12=1.20V 120 MHz 6.42 6.62 7.22 8.02 9.43 mA VDD12=1.10V 80 MHz 4.13 4.49 4.85 5.57 6.65 72 MHz 3.77 3.95 4.49 5.21 6.29 64 MHz 3.42 3.59 4.13 4.67 5.93 48 MHz 2.55 2.73 3.2 3.77 5.03 32 MHz 1.74 1.91 2.37 3 4.13 26 MHz 1.42 1.57 2.01 2.63 3.77 16 MHz 0.91 1.06 1.49 2.11 3.24 8 MHz 0.52 0.65 1.08 1.7 2.83 4 MHz 0.31 0.45 0.88 1.49 2.61 2 MHz 0.2 0.35 0.78 1.38 2.5 1 MHz 0.15 0.29 0.71 1.34 2.44 100 KHz 0.11 0.25 0.67 1.27 2.39 1. All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS input = 3.3 V, SMPS efficiency = 85%. |
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