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BS640HD9V Datasheet(PDF) 86 Page - Advanced Micro Devices |
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BS640HD9V Datasheet(HTML) 86 Page - Advanced Micro Devices |
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86 / 89 page ![]() 84 Am29BDS128H/Am29BDS640H 27024B3 May 10, 2006 D A TA SH EE T ERASE AND PROGRAMMING PERFORMANCE Notes: 1. Typical program and erase times assume the following conditions: 25 °C, 1.8 V V CC, 1 million cycles. Additionally, programming typicals assumes a checkerboard pattern. 2. Under worst case conditions of 90°C, VCC = 1.65 V, 1,000,000 cycles. 3. The typical chip programming time is considerably less than the maximum chip programming time listed. 4. In the pre-programming step of the Embedded Erase algorithm, all words are programmed to 00h before erasure. 5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 20, “Memory Array Command Definitions,” on page 46 for further information on command definitions. 6. The device has a minimum erase and program cycle endurance of 1 million cycles. BGA BALL CAPACITANCE Notes: 1. Sampled, not 100% tested. 2. Test conditions TA = 25°C, f = 1.0 MHz. DATA RETENTION Parameter Typ (Note 1) Max (Note 2) Unit Comments Sector Erase Time 32 Kword 0.4 5 s Excludes 00h programming prior to erasure (Note 4) 4 Kword 0.2 5 Chip Erase Time 128 Mb 103 s 64 Mb 54 s Word Programming Time 9 210 µs Excludes system level overhead (Note 5) Accelerated Word Programming Time 4 120 µs Chip Programming Time (Note 3) 128 Mb 75.5 226.5 s 64 Mb 38 114 s Excludes system level overhead (Note 5) Accelerated Chip Programming Time 128 Mb 33 99 s 64 Mb 17 30 s Parameter Symbol Parameter Description Test Setup Typ Max Unit CIN Input Capacitance VIN = 0 4.2 5.0 pF COUT Output Capacitance VOUT = 0 5.4 6.5 pF CIN2 Control Pin Capacitance VIN = 0 3.9 4.7 pF Parameter Test Conditions Min Unit Minimum Pattern Data Retention Time 150 °C10 Years 125 °C20 Years |
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