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R8C/20 Datasheet(PDF) 404 Page - Renesas Technology Corp

Part # R8C/20
Description  MCU R8C FAMILY / R8C/2x SERIES
PDF  501 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R8C/20 Datasheet(HTML) 404 Page - Renesas Technology Corp

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R8C/20 Group, R8C/21 Group
19. Flash Memory
Rev.2.00 Aug 27, 2008
Page 388 of 458
REJ09B0250-0200
Figure 19.7
FMR4 Register
Flash Memory Control Register 4
Symbol
Address
After Reset
FMR4
01B3h
01000000b
Bit Symbol
Bit Name
Function
RW
NOTES:
1.
2.
3.
4.
5.
When setting this bit to 1, set to 1 immediately after setting it first to 0. Do not generate an interrupt betw een setting
the bit to 0 and setting it to 1.
This bit is enabled w hen the FMR40 bit is set to 1 (enable) and this bit can be w ritten during the period betw een
issuing an erase command and completing an erase (This bit is set to 0 during the periods other than above.)
In EW0 mode, this can be set to 0 or 1 by a program.
In EW1 mode, this bit is automatically set to 1 if a maskable interrupt is generated during an erase operation w hile the
FMR40 bit is set to 1. Do not set this bit to 1 by a program (0 can be w ritten).
b3 b2
Set to 0
b1 b0
FMR41
—
(b5-b2)
0
FMR40
FMR42
FMR44
b7 b6 b5 b4
RW
RW
Erase-suspend function
enable bit(1)
0 : Disables reading
1 : Enables reading
Reserved bit
0 : Disable
1 : Enable
Erase-suspend request bit(2)
0 : Erase restart
1 : Erase-suspend request
RO
RO
RW
FMR43
Erase command flag
0 : Erase not executed
1 : During erase execution
RO
0 : Disable
1 : Enable
FMR46
Program-suspend request bit(3) 0 : Program restart
1 : Program-suspend request
Set the FMR01 bit in the FMR0 register to 0 (CPU rew rite mode disabled) in low -pow er-consumption read mode.
In high-speed clock mode and high-speed on-chip oscillator mode, set the FMR47 bit to 0 (disabled).
Program command flag
0 : Program not executed
1 : During program execution
RO
The FMR42 bit is enabled only w hen the FMR40 bit is set to 1 (enable) and programming to the FMR42 bit is enabled
until the auto-program ends since the program command is generated. (This bit is set to 0 during periods other than
above.)
In EW0 mode, 0 or 1 can be programmed to the FMR42 bit by a program.
In EW1 mode, the FMR42 bit is automatically set to 1 by generating a maskable interrupt during the auto-program
w hen the FMR40 bit is set to 1. 1 cannot be programmed to the FMR42 bit by a program.
FMR47
Read status flag
RW
Low -pow er consumption read
mode enable bit (1,4)



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