R8CSLASH20 datasheet(400/501 Pages) RENESAS

400 / 501 page

R8C/20 Group, R8C/21 Group

19. Flash Memory

Rev.2.00 Aug 27, 2008

Page 384 of 458

REJ09B0250-0200

Figure 19.5 shows the FMR0 Register, Figure 19.6 shows the FMR1 Register and Figure 19.7 shows the FMR4

19.4.2.1

FMR00 Bit

This bit indicates the operating status of the flash memory. The bit is 0 during programming, erasing (including

suspend periods), or erase-suspend mode; otherwise, the bit is 1.

19.4.2.2

FMR01 Bit

The MCU is made ready to accept commands by setting the FMR01 bit to 1 (CPU rewrite mode).

19.4.2.3

FMR02 Bit

The block0, block1, block2 and block3 do not accept the program and block erase commands if the FMR02 bit

is set to 0 (rewrite disabled).

The block0 and block1 are controlled rewriting in the FMR15 and FMR16 bits if the FMR02 bit is set to 1

(rewrite enabled).

19.4.2.4

FMSTP Bit

This bit is provided for initializing the flash memory control circuits, as well as for reducing the amount of

current consumed in the flash memory. The flash memory is disabled against access by setting the FMSTP bit to

1. Therefore, the FMSTP bit must be written to by a program transferred to the RAM.

In the following cases, set the FMSTP bit to 1:

• When flash memory access resulted in an error while erasing or programming in EW0 mode (FMR00 bit

not reset to 1 (ready))

• When entering high-speed on-chip oscillator mode, low-speed on-chip oscillator mode (XIN clock stop)

Figure 19.11 shows a Process to Reduce Power Consumption in High-Speed On-Chip Oscillator Mode, Low-

Speed On-Chip Oscillator Mode (XIN Clock Stops) and Low-Speed Clock Mode (XIN Clock Stops). Note that

when going to stop or wait mode while the CPU rewrite mode is disabled, the FMR0 register does not need to

be set because the power for the flash memory is automatically turned off and is turned back on again after

returning from stop or wait mode.

19.4.2.5

FMR06 Bit

This is a read-only bit indicating the status of auto program operation. The bit is set to 1 when a program error

occurs; otherwise, it is cleared to 0. For details, refer to the description of the 19.4.5 Full Status Check.

19.4.2.6

FMR07 Bit

This is a read-only bit indicating the status of auto erase operation. The bit is set to 1 when an erase error occurs;

otherwise, it is set to 0. Refer to 19.4.5 Full Status Check for the details.

19.4.2.7

FMR11 Bit

Setting this bit to 1 (EW1 mode) places the MCU in EW1 mode.

19.4.2.8

FMR15 Bit

When the FMR02 bit is set to 1 (rewrite enabled) and the FMR15 bit is set to 0 (rewrite enabled), the block0

accepts the program command and block erase command.

19.4.2.9

FMR16 Bit

When the FMR02 bit is set to 1 (rewrite enabled) and the FMR16 bit is set to 0 (rewrite enabled), the block1

accepts the program command and block erase command.

19.4.2.10 FMR40 Bit

The suspend function is enabled by setting the FMR40 bit to 1 (enable).

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