AS7150 datasheet(102/159 Pages) AMSOSRAM

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AS7150

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DS001130 • v3-00 • 2026-Jan-26

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8.9.11

SEQ2_FREQDIVL register (Address 0x4A)

Table 69: SEQ2_FREQDIVL register

Addr: 0x4A

SEQ2_FREQDIVL

Bit

Bit name

Default

Access

Bit description

7:0

seq2_freqdiv[7:0]

R/W

This is the lower 8-bit frequency divider

registers for sequencer 2 sample period.

Please find the calculation formulas for

sequencer 2 sample rate and period time

below where n represents the full 16-bit

seq2_freqdiv[15:0] register value which is

split into two 8 bit registers

SEQ2_FREQDIVL and SEQ2_FREQDIVH.

In order to get a better understanding of the

clock generation unit Figure 19 provides and

overview of the clock tree.

��2 = (�� + 1) ∗ ��

��2 =

��

��+1

8.9.12

SEQ2_FREQDIVH register (Address 0x4B)

Table 70: SEQ2_FREQDIVH register

Addr: 0x4B

SEQ2_FREQDIVH

Bit

Bit name

Default

Access

Bit description

7:0

seq2_freqdiv[15:8]

R/W

This is the higher 8-bit frequency divider

registers for sequencer 2 sample period.

Please find the calculation formulas for

sequencer 2 sample rate and period time

below where n represents the full 16-bit

seq2_freqdiv[15:0] register value which is

split into two 8-bit registers

SEQ2_FREQDIVL and SEQ2_FREQDIVH.

In order to get a better understanding of the

clock generation unit Figure 19 provides and

overview of the clock tree.

��2 = (�� + 1) ∗ ��

��2 =

��

��+1

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