Data Sheet

ADSP1802

SHARC Processor

Rev. D

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FEATURES

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High performance 32-bit/40-bit floating-point processor for high

performance audio processing

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SIMD computational architecture

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On-chip memory

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5 Mb L1 on-chip RAM

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8 Mb L2 RAM

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Maximum instruction rate up to 400 MHz

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Supports VISA

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Supports FIR, IIR, FFT accelerator

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DAI

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8 SPORTs

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4 PCGs

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1 S/PDIF transceiver

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4 ASRCs with −140 dB SNR performance

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1 IDP/PDAP

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1 DAI SRU

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DPI

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2 SPIs

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1 UART

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12 flags

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1 TWI

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3 PWM modules (PWM1, PWM2, and PWM3)

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2 general-purpose timers

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1 DPI SRU2

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1 thermal diode

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AEC-Q100 qualified for automotive applications

APPLICATIONS

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Audio and acoustic processing in cabin, including active sound

design, advanced chime, hands free and voice preprocessing,

active noise cancellation, and audio path management

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Audio processing in consumer applications, including UI commu-

nication, professional audiovisual, hearables, and home theaters

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Intelligent buildings with security and surveillance

GENERAL DESCRIPTION

The ADSP1802 is a digital signal processor (DSP) that features

Analog Devices, Inc. Super Harvard Architecture Single-Chip Com-

puter (SHARC). The ADSP1802 is a 32-bit/40-bit floating point pro-

cessor optimized for high performance audio applications with large

on-chip RAM, multiple internal buses to eliminate I/O bottlenecks,

and features an innovative digital applications interface (DAI).

FUNCTIONAL BLOCK DIAGRAM

Figure 1. Functional Block Diagram