APR7SLASHD datasheet(15/101 Pages) NXP

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DSP56001A

Host Interface (HI) Port

MOTOROLA

DSP56001A/D, Rev. 1

1-9

HEN

PB12

Input

Input or

Output

Tri-stated Host Enable—This input enables a data transfer on the host data bus.

When HEN is asserted and HR/W is high, H0–H7 become outputs

and the host processor may read DSP56001A data. When HEN is

asserted and HR/W is low, H0–H7 become inputs. Host data is

latched in the DSP on the rising edge of HEN. Normally, a chip select

signal derived from host address decoding and an enable strobe are

used to generate HEN.

Port B GPIO 12 (PB12)

—This signal is aGPIO signal called PB12

when the Host Interface is not being used.

After reset, the default state for this signal is GPIO input.

HREQ

PB13

Open

drain

Output

Input or

Output

Tri-stated Host Request—This signal is used by the Host Interface to request

service from the host processor, DMA controller, or a simple external

controller.

Note:

HREQ should always be pulled high when it is not in use.

Port B GPIO 13 (PB13)

—This signal is a GPIO (not open-drain) signal

(PB13) when the Host Interface is not selected.

After reset, the default state for this signal is GPIO input.

HACK

PB14

Input

Input or

Output

Tri-stated Host Acknowledge—This input has two functions. It provides a host

acknowledge handshake signal for DMA transfers and it receives a

host interrupt acknowledge compatible with MC68000 family

processors.

Note:

HACK should always be pulled high when it is not in use.

Port B GPIO 14 (PB14)

—This signal is a GPIO signal (PB14) when the

Host Interface is not selected, and may be programmed as a GPIO

signal when the Host Interface is selected.

After reset, the default state for this signal is GPIO input.

Table 1-9

HI Signals (Continued)

Signal

Name

Signal

Type

State

during

Reset

Signal Description

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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