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IS25LP256D-RLLA3 Datasheet(PDF) 154 Page - Integrated Silicon Solution, Inc

Part # IS25LP256D-RLLA3
Description  SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  174 Pages
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP256D-RLLA3 Datasheet(HTML) 154 Page - Integrated Silicon Solution, Inc

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IS25LP256D
IS25WP256D
Integrated Silicon Solution, Inc.- www.issi.com
154
Rev A6
04/15/2019
8.61 READ PASSWORD OPERATION (RDPWD, E7h)
The correct password value may be read only after it is programmed and before the Password Mode has been
selected by programming the Password Protection Mode bit to “0” in the ASP Register (ASP[2]). After the Password
Protection Mode is selected the RDPWD command is ignored.
The RDPWD command is shifted in. Then the 64-bit Password is shifted out, least significant byte first, most
significant bit of each byte first. Each bit is shifted out at the SCK frequency by the falling edge of the SCK signal.
It is possible to read the Password continuously by providing multiples of 64bits. The maximum operating clock
frequency for the RDPWD command is the same with Fast Read Operation.
Figure 8.142 Read password Sequence In SPI Mode
Instruction = E7h
CE #
SCK
SI
SO
0
1
...
7
8
9
...
15
16
17
...
23
...
64
65
...
Mode 3
Mode 0
tV
7
15
14
8
6
...
0
63
62
56
...
...
...
71
1
st byte Data Out
2
nd byte Data Out
...
8
th byte Data Out
Figure 8.143 Read Password Sequence In QPI Mode
E7h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0
2
3
4
5
tV
...
16
17
1
st byte
Data In
2
nd byte
Data In
...
8
th byte
Data In



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