IS25LP256D-RLLA3 datasheet(94/174 Pages) ISSI

94 / 174 page

IS25LP256D

IS25WP256D

Integrated Silicon Solution, Inc.- www.issi.com

Rev A6

04/15/2019

8.24 ENTER DEEP POWER DOWN (DP, B9h)

The Deep Power-down (DP) instruction is for setting the device on the minimizing the power consumption (enter

into Power-down mode). During this mode, standby current is reduced from Isb1 to Isb2. While in the Power-down

mode, the device is not active and all Write/Program/Erase instructions are ignored. The instruction is initiated by

driving the CE# pin low and shifting the instruction code into the device. The CE# pin must be driven high after the

instruction has been latched, or Power-down mode will not engage. Once CE# pin driven high, the Power-down

mode will be entered within the time duration of tDP. While in the Power-down mode only the Release from Power-

down/RDID instruction, which restores the device to normal operation, will be recognized. All other instructions are

ignored, including the Read Status Register instruction which is always available during normal operation. Ignoring

all but one instruction makes the Power Down state a useful condition for securing maximum write protection. It is

available in both SPI and QPI mode.

Figure 8.55 Enter Deep Power Down Mode Sequence

Instruction = B9h

CE #

SCK

Mode 3

Mode 0

tDP

High Impedance

Figure 8.56 Enter Deep Power Down Mode QPI Sequence

B9h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

tDP

IS25LP256D-RLLA3 Datasheet(PDF) 94 Page - Integrated Silicon Solution, Inc