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IS25LP256D-RLLA3 Datasheet(PDF) 85 Page - Integrated Silicon Solution, Inc

Part # IS25LP256D-RLLA3
Description  SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  174 Pages
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP256D-RLLA3 Datasheet(HTML) 85 Page - Integrated Silicon Solution, Inc

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IS25LP256D
IS25WP256D
Integrated Silicon Solution, Inc.- www.issi.com
85
Rev A6
04/15/2019
8.17 WRITE DISABLE OPERATION (WRDI, 04h)
The Write Disable (WRDI) instruction resets the WEL bit and disables all write instructions. The WRDI instruction
is not required after the execution of a write instruction, since the WEL bit is automatically reset.
Figure 8.43 Write Disable Sequence In SPI Mode
Instruction = 04h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.44 Write Disable Sequence In QPI Mode
04h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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