IS25LP256D-RLLA3 datasheet(157/174 Pages) ISSI

Part #	IS25LP256D-RLLA3

Description	SERIAL FLASH MEMORY WITH 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE

PDF	174 Pages

Scroll/Zoom	100%

Manufacturer	ISSI [Integrated Silicon Solution, Inc]

Direct Link	http://www.issi.com

Logo

157 / 174 page

IS25LP256D

IS25WP256D

Integrated Silicon Solution, Inc.- www.issi.com

157

Rev A6

04/15/2019

8.64 GANG SECTOR/BLOCK LOCK OPERATION (GBLK, 7Eh)

The Gang Sector/Block Lock (GBLK) instruction provides a quick method to set all DYB (Dynamic Protection Bit)

bits to “0” at once.

The sequence of issuing GBLK instruction is: drive CE# low  send GBLK instruction code  drive CE# high.

The instruction code will be shifted into the device on the rising edge of SCK.

The GBLK command is accepted in both SPI and QPI mode. The CE# must go high exactly at the byte boundary,

otherwise, the instruction will be ignored. While the GBLK operation is in progress, the Status Register or Extended

Read Register may be read to check the value of the

Write In Progress (WIP) bit. The WIP bit is “1” during the

GBLK operation, and is “0” when it is completed.

Figure 8.148 Gang Sector/Block Lock Sequence In SPI Mode

Instruction = 7Eh

CE#

SCK

Mode 3

Mode 0

High Impedance

Figure 8.149 Gang Sector/Block Lock Sequence In QPI Mode

7Eh

CE#

SCK

IO[3:0]

Mode 3

Mode 0

IS25LP256D-RLLA3 Datasheet(PDF) 157 Page - Integrated Silicon Solution, Inc