IS25LP256D-RLLA3 datasheet(156/174 Pages) ISSI

156 / 174 page

IS25LP256D

IS25WP256D

Integrated Silicon Solution, Inc.- www.issi.com

156

Rev A6

04/15/2019

8.63 UNLOCK PASSWORD OPERATION (UNPWD, E9h)

The UNPWD command is entered by driving CE# low, followed by the instruction code and the password data

bytes, least significant byte first, most significant bit of each byte first. The password is 64bits in length.

CE# must be driven high after the 64th bit of data has been latched. If not, the UNPWD command is not executed.

As soon as CE# is driven high, the UNPWD operation is initiated. While the UNPWD operation is in progress, the

Status Register or Extended Read Register may be read to check the value of the Write In Progress (WIP) bit. The

WIP bit is “1” during the UNPWD operation, and is “0” when it is completed.

If the UNPWD command supplied password does not match the hidden password in the Password Register, the

UNPWD command is ignored. This returns the device to standby state, ready for a new command such as a retry

of the UNPWD

command. If the password does match, the PPB Lock bit is set to “1”. The maximum clock frequency

for the UNPWD command is the same with Fast Read Operation.

Figure 8.146 Unlock Password Sequence In SPI Mode

Instruction = E9h

CE #

SCK

...

Mode 3

Mode 0

...

st byte Data In

nd byte Data In

...

th byte Data In

High Impedence

Figure 8.147 Unlock Password Sequence In SPI Mode

E9h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

st byte

Data In

nd byte

Data In

...

th byte

Data In

...

IS25LP256D-RLLA3 Datasheet(PDF) 156 Page - Integrated Silicon Solution, Inc

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