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ADP5585ACPZ-00-R7 Datasheet(PDF) 30 Page - Analog Devices |
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ADP5585ACPZ-00-R7 Datasheet(HTML) 30 Page - Analog Devices |
30 / 40 page ![]() ADP5585 Data Sheet Rev. C | Page 30 of 40 GPIO_DIRECTION_A Register 0x27 Table 47. GPIO_DIRECTION_A Bit Descriptions Bit(s) Bit Name Access Description 7 to 6 N/A Reserved. 5 GPIO_6_DIR Read/write (Reserved except for ADP5585AC_Z-01-R7 options) 0 = GPIO 6 is an input. 1 = GPIO 6 is an output. 4 GPIO_5_DIR Read/write 0 = GPIO 5 is an input. 1 = GPIO 5 is an output. 3 GPIO_4_DIR Read/write 0 = GPIO 4 is an input. 1 = GPIO 4 is an output. 2 GPIO_3_DIR Read/write 0 = GPIO 3 is an input. 1 = GPIO 3 is an output. 1 GPIO_2_DIR Read/write 0 = GPIO 2 is an input. 1 = GPIO 2 is an output. 0 GPIO_1_DIR Read/write 0 = GPIO 1 is an input. 1 = GPIO 1 is an output. GPIO_DIRECTION_B Register 0x28 Table 48. Register 0x28, GPIO_DIRECTION_B Bit Descriptions Bit(s) Bit Name Access Description 7 to 5 N/A Reserved. 4 GPIO_11_DIR Read/write 0 = GPIO 11 is an input. 1 = GPIO 11 is an output. 3 GPIO_10_DIR Read/write 0 = GPIO 10 is an input. 1 = GPIO 10 is an output. 2 GPIO_9_DIR Read/write 0 = GPIO 9 is an input. 1 = GPIO 9 is an output. 1 GPIO_8_DIR Read/write 0 = GPIO 8 is an input. 1 = GPIO 8 is an output. 0 GPIO_7_DIR Read/write 0 = GPIO 7 is an input. 1 = GPIO 7 is an output. RESET1_EVENT_A Register 0x29 Table 49. RESET1_EVENT_A Bit Descriptions Bit(s) Bit Name Access Description 7 RESET1_EVENT_A_LEVEL Read/write Defines which level the first reset event should be to generate the RESET1 signal. For key events, use the following settings: 0 = not applicable; releases not used for reset generation. 1 = press is used as reset event. For GPIs and logic outputs configured for FIFO updates, use the following settings: 0 = inactive event used as reset condition. 1 = active event used as reset condition. 6 to 0 RESET1_EVENT_A[6:0] Read/write Defines an event that can be used to generate the RESET1 signal. Up to three events can be defined for generating the RESET1 signal, using RESET1_EVENT_A[6:0], RESET1_EVENT_B[6:0], and RESET1_EVENT_C[6:0]. If one of the registers is 0, that register is not used for reset generation. All reset events must be detected at the same time to trigger the reset. |
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