R8CSLASH20 datasheet(104/501 Pages) RENESAS

104 / 501 page

R8C/20 Group, R8C/21 Group

12. Interrupts

Rev.2.00 Aug 27, 2008

Page 88 of 458

REJ09B0250-0200

12.1.2

Software Interrupts

A software interrupt is generated when an instruction is executed. The software interrupts are non-maskable

interrupts.

12.1.2.1

Undefined Instruction Interrupt

The undefined instruction interrupt is generated when the UND instruction is executed.

12.1.2.2

Overflow Interrupt

The overflow interrupt is generated when the O flag is set to 1 (arithmetic operation overflow) and the INTO

instruction is executed. Instructions to set the O flag are:

ABS, ADC, ADCF, ADD, CMP, DIV, DIVU, DIVX, NEG, RMPA, SBB, SHA, SUB

12.1.2.3

BRK Interrupt

A BRK interrupt is generated when the BRK instruction is executed.

12.1.2.4

INT Instruction Interrupt

An INT instruction interrupt is generated when the INT instruction is executed. The INT instruction can select

software interrupt numbers 0 to 63. Software interrupt numbers 3 to 31 are assigned to the peripheral function

interrupt. Therefore, the MCU executes the same interrupt routine when the INT instruction is executed as

when a peripheral function interrupt is generated. In software interrupt numbers 0 to 31, the U flag is saved to

the stack during instruction execution and set the U flag to 0 (ISP selected) before executing an interrupt

sequence. The U flag is restored from the stack when returning from the interrupt routine. In software interrupt

numbers 32 to 63, the U flag does not change state during instruction execution, and the selected SP is used.

R8C/20 Datasheet(PDF) 104 Page - Renesas Technology Corp