R8CSLASH20 datasheet(410/501 Pages) RENESAS

410 / 501 page

R8C/20 Group, R8C/21 Group

19. Flash Memory

Rev.2.00 Aug 27, 2008

Page 394 of 458

REJ09B0250-0200

Figure 19.13

Program Command (When Suspend Function Enabled)

Start

Write the command code 40h

to the write address

Write data to the write address

FMR44 = 0 ?

Full status check

Program completed

Yes

EW0 Mode

FMR40 = 1

Start

Write the command code 40h

Write data to the write address

FMR44 = 0 ?

Full status check

Program completed

Yes

EW1 Mode

FMR40 = 1

Maskable interrupt (2)

REIT

Access flash memory

FMR42 = 0

NOTES:

1. In EW0 mode, the interrupt vector table and interrupt routine for interrupts to be used should be allocated to the RAM area.

2. td(SR-SUS) is needed until the interrupt request is acknowledged after it is generated. The interrupt to enter suspend

should be in interrupt enabled status.

3. When no interrupt is used, the instruction to enable interrupts is not needed.

4. td(SR-SUS) is needed until program is suspended after the FMR42 bit in the FMR4 register is set to 1.

Maskable interrupt(1)

FMR46 = 1 ?

REIT

Yes

FMR42 = 1(4)

FMR42 = 0

Access flash memory

FMR44 = 1 ?

Yes

Access flash memory

I = 1 (enable interrupt)

I = 1 (enable interrupt)(3)

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