R8CSLASH20 datasheet(359/501 Pages) RENESAS

359 / 501 page

R8C/20 Group, R8C/21 Group

16. Clock Synchronous Serial Interface

Rev.2.00 Aug 27, 2008

Page 343 of 458

REJ09B0250-0200

Figure 16.49

Example of Register Setting in Slave Receive Mode (I2C Bus Interface Mode)

End

RDRF = 1 ?

Slave receive mode

Yes

(1) Set the AAS bit to 0(1)

(2) Set the ACKBT bit to the transmit device

(3) Dummy-read to the ICDRR register

(4) Wait 1 byte is received

(5) Judge (last receive - 1)

(6) Read the receive data

(7) Set the ACKBT bit of the last byte(1)

(8) Read the receive data of (last byte - 1)

(9) Wait the last byte is received

(10) Read the receive data of the last byte

Dummy-read in ICDRR register

Read RDRF bit in ICSR register

Last receive

- 1 ?

(1)

(2)

(3)

(4)

(5)

(6)

(7)

(8)

(10)

(9)

ICIER register ACKBT bit

← 0

Yes

Read ICDRR register

ICIER register

ACKBT bit

← 1

Read ICDRR register

Read RDRF bit in ICSR register

RDRF = 1 ?

Read ICDRR register

Yes

NOTE:

1. When receiving 1 byte, skip steps (2) to (6) after (1) and jump to process of step (7).

Process of step (8) is dummy-read in the ICDRR register.

ICSR register

AAS bit

← 0

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