LAN9500AI datasheet(95/213 Pages) MICROCHIP

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DS00001875A-page 95

LAN950x

The Flag Attributes Register (FLAG_ATTR) provides the mechanism to initialize components of the Configuration Flags

and GPIO PME Flags that are stand-alone and not part of any other System Control and Status Register. During

EEPROM operation, the analogous fields in this register are read by the hardware from the EEPROM and are not avail-

able to the software for read-back or modification.

Note 1: The software device driver must initialize these registers prior to initializing the Descriptor RAM.

2: The bmAttributes field of the HS and FS descriptors in descriptor RAM (if present) must be consistent with

the contents of the Flag Attributes Register (FLAG_ATTR).

5.8.3

DESCRIPTOR RAM INITIALIZATION

The Descriptor RAM contents are initialized using the Data Port registers. The Data Port registers are used to select the

Descriptor RAM and write the descriptor elements into it. The Descriptor RAM is 512 bytes in length. Every descriptor

written into the Descriptor RAM must be DWORD aligned. The Attribute Registers discussed in Section 5.8.2 must be

written with the length of the descriptors written into the Descriptor RAM. If a descriptor is not used, hence not written

into Descriptor RAM, its length must be written as 0 into the associated Attribute Register.

Note 1: The Attribute Registers must be initialized before the Descriptor RAM.

2: Address 0 of the Descriptor RAM is always reserved for the Language ID descriptor, even if it will not be

supported.

The descriptors must be written in the following order, starting at address 0 of the RAM and observing the DWORD align-

ment rule:

• Language ID Descriptor

• Manufacturing String Descriptor (String Index 1)

• Product Name String Descriptor (String Index 2)

• Serial Number String Descriptor (String Index 3)

• Configuration String Descriptor (String Index 4)

• Interface String Descriptor (String Index 5)

• HS Device Descriptor

• HS Configuration Descriptor

• FS Device Descriptor

• FS Configuration Descriptor

An example of Descriptor RAM use is illustrated in Figure 5-28.

As in the case of descriptors specified in EEPROM, the following restrictions apply to descriptors written into Descriptor

RAM:

For Device Descriptors, the only valid values for the length are 0 and 18. The descriptor size for the Device

Descriptors specified in the Descriptor RAM is a don't care and always overwritten by HW to 0x12 when trans-

mitting the descriptor to the host.

The descriptor type for Device Descriptors specified in the Descriptor RAM is a don't care and is always overwrit-

ten by HW to 0x1 when transmitting the descriptor to the host.

For the Configuration and Interface descriptor, the only valid values for the length are 0 and 18. The descriptor

size for the Device Descriptors specified in the Descriptor RAM is a don't care and always overwritten by HW to

0x12 when transmitting the descriptor to the host.

The descriptor type for the configuration descriptors specified in the Descriptor RAM is a don't care and always

overwritten by HW to 0x2 when transmitting the descriptor to the host.

If a string descriptor does not exist in the Descriptor RAM, the referencing descriptor must contain 00h for the

respective string index field.

If all string descriptor lengths are zero than a Language ID will not be supported.

Note 1: The first entry in the Descriptor RAM is always reserved for the Language ID descriptor, even if it will not be

supported.

2: Descriptors specified having bcdUSB, bMaxPacketSize0, and bNumConfigurations fields defined with val-

ues other than 0200h, 40h, and 1, respectively, will result in unwanted behavior and untoward results.

The RAM Test Mode Enable (TESTEN) bit must be deasserted after programming the descriptor RAM.

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