LAN9500AI datasheet(44/213 Pages) MICROCHIP

44 / 213 page

LAN950x

DS00001875A-page 44

 2010 - 2015 Microchip Technology Inc.

A received Ethernet frame is not visible to the UTX until the complete frame, including the RX Status Word, has been

written into the RX FIFO. This is due to the fact that the frame may have to be removed via a rewind (pointer adjustment),

in case of an error. Such is the case when a FIFO overflow condition is detected as the frame is being received. The

FCT may also be configured to rewind errored frames. Please refer to Section 5.4.1.1, "RX Error Detection," on page 44

for further details.

5.4.1.1

RX Error Detection

The FCT can be configured to drop Ethernet frames when certain error conditions occur. The setting of the Discard

Errored Received Ethernet Frame (DRP) bit of the Hardware Configuration Register (HW_CFG) on page 122 deter-

mines if the frame will be retained or dropped. Error conditions are indicated in the Rx Status Word. The following error

conditions are tracked by the TLI:

• CRC Error

• Collision Seen

• Frame Too Long

•Runt Frame

Please refer to Section 5.3.1.7, "Statistics," on page 36 for more details on the error conditions tracked by the device.

The FCT also drops frames when it detects a FIFO overflow condition. This occurs when the FIFO full condition occurs

while a frame is being received. The FCT also maintains a count of the number of times a FIFO overflow condition has

occurred.

FIGURE 5-4:

RX FIFO STORAGE

RX Status Word

RX Ethernet

Frame 0

RX Status Word

RX Ethernet

Frame 1

rx_rd_ptr

rx_wr_hd_ptr

RX Ethernet

Frame 2

rx_wr_ptr

After the complete

Ethernet frame is written,

the size and status is

updated at the location

pointed to by the write

head pointer.

The write head pointer will

then advance to the

starting location for the

next Ethernet frame.

The read head pointer is

used for implementing

rewinds of USB packets.

rx_rd_hd_ptr

USB

Packet 0

USB

Packet 1

USB

Packet 2

USB

Packet 3

FIFO data is available for

transmit only after a

complete Ethernet frame is

received and stored.

Therefore, the RX FIFO

size will not reflect partially

received packets.

RX FIFO Size

Byte padding inserted by

the FCT. This amount is

determined by

RXDOFF[1:0]

Additional padding may be

inserted by the UTX.

The unused bytes in the

first and last DWORDs are

ignored by the host.

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