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LAN9500AI Datasheet(PDF) 76 Page - Microchip Technology |
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LAN9500AI Datasheet(HTML) 76 Page - Microchip Technology |
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76 / 213 page  LAN950x DS00001875A-page 76 2010 - 2015 Microchip Technology Inc. 5.6.6.2 Disabling Auto-negotiation Auto-negotiation can be disabled by setting register 0, bit 12 to zero. The device will then force its speed of operation to reflect the information in register 0, bit 13 (speed) and register 0, bit 8 (duplex). The speed and duplex bits in register 0 should be ignored when auto-negotiation is enabled. 5.6.6.3 Half vs. Full-Duplex Half-duplex operation relies on the CSMA/CD (Carrier Sense Multiple Access / Collision Detect) protocol to handle net- work traffic and collisions. In this mode, the internal carrier sense signal, CRS, responds to both transmit and receive activity. In this mode, If data is received while the PHY is transmitting, a collision results. In full-duplex mode, the PHY is able to transmit and receive data simultaneously. In this mode, the internal CRS responds only to receive activity. The CSMA/CD protocol does not apply and collision detection is disabled. Table 5-56 describes the behavior of the internal CRS bit under all receive/transmit conditions. The internal CRS signal is used to trigger bit 10 (No Carrier) of the TX Status Word (See Section 5.4.2.6, "TX Status Format," on page 50). The CRS value, and subsequently the No Carrier value, are invalid during any full-duplex trans- mission. Therefore, these signals cannot be used as a verification method of transmitted packets when transmitting in 10/100 Mbps full-duplex modes. Note 5-1 The device’s 10/100 PHY internal CRS signal operates in two modes: Active and Low. When in Active mode, the internal CRS will transition high and low upon line activity, where a high value indicates a carrier has been detected. In Low mode, the internal CRS stays low and does not indicate carrier detection. The internal CRS signal and No Carrier (bit 10 of the TX Status Word) cannot be used as a verification method of transmitted packets when transmitting in 10/100 Mbps full-duplex mode. 5.6.7 HP AUTO-MDIX HP Auto-MDIX facilitates the use of CAT-3 (10 BASE-T) or CAT-5 (100 BASE-T) media UTP interconnect cable without consideration of interface wiring scheme. If a user plugs in either a direct connect LAN cable, or a cross-over patch cable, as shown in Figure 5-19, the device’s Auto-MDIX PHY is capable of configuring the TPO and TPI twisted pair pins for correct transceiver operation. The internal logic of the device detects the TX and RX pins of the connecting device. Since the RX and TX line pairs are interchangeable, special PCB design considerations are needed to accommodate the symmetrical magnetics and termination of an Auto-MDIX design. TABLE 5-56: CRS BEHAVIOR Mode Speed Duplex Activity CRS Behavior (Note 5-1) Manual 10 Mbps Half-Duplex Transmitting Active Manual 10 Mbps Half-Duplex Receiving Active Manual 10 Mbps Full-Duplex Transmitting Low Manual 10 Mbps Full-Duplex Receiving Active Manual 100 Mbps Half-Duplex Transmitting Active Manual 100 Mbps Half-Duplex Receiving Active Manual 100 Mbps Full-Duplex Transmitting Low Manual 100 Mbps Full-Duplex Receiving Active Auto-Negotiation 10 Mbps Half-Duplex Transmitting Active Auto-Negotiation 10 Mbps Half-Duplex Receiving Active Auto-Negotiation 10 Mbps Full-Duplex Transmitting Low Auto-Negotiation 10 Mbps Full-Duplex Receiving Active Auto-Negotiation 100 Mbps Half-Duplex Transmitting Active Auto-Negotiation 100 Mbps Half-Duplex Receiving Active Auto-Negotiation 100 Mbps Full-Duplex Transmitting Low Auto-Negotiation 100 Mbps Full-Duplex Receiving Active |
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