LAN9500AI datasheet(82/213 Pages) MICROCHIP

82 / 213 page

LAN950x

DS00001875A-page 82

 2010 - 2015 Microchip Technology Inc.

5.7.2

EEPROM DEFAULTS

The signature value of 0xA5 is stored at address 0. A different signature value indicates to the EEPROM controller that

no EEPROM or an un-programmed EEPROM is attached to the device. In this case, the hardware default values are

used, as shown in Table 5-60. Please refer to Section 5.3.1.6, "USB Descriptors," on page 31 for further information

about the default USB values.

Note 5-2

Product IDs are:

Note 1: The Configuration Flags are affected by the PWR_SEL and RMT_WKP straps.

2: Refer to theLAN950x Vendor/Product ID application note for details on proper usage of these fields.

5.7.3

EEPROM AUTO-LOAD

Certain system level resets (USB reset, POR, nRESET, and SRST) cause the EEPROM contents to be loaded into the

device. After a reset, the EEPROM controller attempts to read the first byte of data from the EEPROM. If the value 0xA5

is read from the first address, then the EEPROM controller will assume that an external Serial EEPROM is present.

The EEPROM Controller will then load the entire contents of the EEPROM into an internal 512 byte SRAM. The contents

of the SRAM are accessed by the CTL (USB Control Block) as needed (I.E. to fill Get Descriptor commands). A detailed

explanation of the EEPROM byte ordering with respect to the MAC address is given in Section 7.4.3, "MAC Address

Low Register (ADDRL)," on page 163.

If an 0xA5h is not read from the first address, the EEPROM controller will end initialization. The default values, as spec-

ified in Table 5-60, will then be assumed by the associated registers. It is then the responsibility of the Host LAN driver

software to set the IEEE address by writing to the MAC’s ADDRH and ADDRL registers.

The device may not respond to the USB Host until the EEPROM loading sequence has completed. Therefore, after

reset, the USB PHY is kept in the disconnect state until the EEPROM load has completed.

5.7.4

EEPROM HOST OPERATIONS

After the EEPROM controller has finished reading (or attempting to read) the EEPROM after a system-level reset, the

Host is free to perform other EEPROM operations. EEPROM operations are performed using the EEPROM Command

(E2P_CMD) and EEPROM Data (E2P_DATA) registers. Section 7.3.12, "EEPROM Command Register (E2P_CMD),"

on page 136 provides an explanation of the supported EEPROM operations.

TABLE 5-60:

EEPROM DEFAULTS

Field

Default Value

MAC Address

FFFFFFFFFFFFh

Full-Speed Polling Interval (mS)

01h

Hi-Speed Polling Interval (mS)

04h

Configuration Flags

04h

Maximum Power (mA)

FAh

Vendor ID

0424h

Product ID

Note 5-2

Product

LAN9500/LAN9500i

9500h

LAN9500A/LAN9500Ai

9E00h

Note:

The USB reset only loads the MAC address.

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