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R5F5630ECDFB Datasheet(PDF) 147 Page - Renesas Technology Corp |
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R5F5630ECDFB Datasheet(HTML) 147 Page - Renesas Technology Corp |
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147 / 165 page ![]() R01DS0060EJ0100 Rev.1.00 Page 147 of 168 Sep 13, 2011 RX630 Group 5. Electrical Characteristics 5.6 A/D Conversion Characteristics Note: • When A/D conversion is done during access to the external bus, the accuracy may degrade. In this case, repeat conversion several times and calculate by software the average of the converted values, excluding the maximum and minimum values. Note 1. The conversion time includes the sampling time and the comparison time. As the test conditions, the number of sampling states is indicated. Note 2. The scanning is not supported. Note 3. The value in parentheses indicates the sampling time. Table 5.21 10-Bit A/D Conversion Characteristics Conditions: VCC = AVCC0 = VCC_USB = 2.7 to 3.6 V, VREFH/VREFH0 = 2.7 V to AVCC0 VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V PCLK = 8 to 50 MHz Ta = Topr Item Min. Typ. Max. Unit Test Conditions Resolution 10 10 10 Bit Conversion time*1 (Operation at PCLK = 50 MHz) With 0.1-µF external capacitor When the capacitor is charged enough*2 3.0 (2.5)*3 — — µs Sampling in 125 states Without 0.1-µF external capacitor Permissible signal source impedance (max.) = 1.0 k Ω, VCC 3.0 V 1.5 (1.0)*3 — — Sampling in 50 states Permissible signal source impedance (max.) = 1.0 k Ω, VCC 2.7 V 3.5 (3.0)*3 — — Sampling in 150 states Permissible signal source impedance (max.) = 5.0 k Ω, VCC 3.0 V 2.0 (1.5)*3 — — Sampling in 75 states Permissible signal source impedance (max.) = 5.0 k Ω, VCC 2.7 V 4.0 (3.5)*3 — — Sampling in 175 states Analog input capacitance — — 6.0 pF Offset error — ±1.5 ±3.0 LSB Full-scale error — ±1.5 ±3.0 LSB Quantization error — ±0.5 — LSB Absolute accuracy — ±1.5 ±3.0 LSB DNL differential nonlinearity error — ±0.5 ±1.0 LSB INL integral nonlinearity error — ±1.5 ±3.0 LSB |
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