SRAM

SRAM

SRAM

SRAM

SRAM

AS5LC512K8

AS5LC512K8

Rev. 2.1 08/09

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

8

Austin Semiconductor, Inc.

(WE Controlled)

ADDRESS

t

WC

t

CW

CE\

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123456789012345678901

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123456789012345678901

1234567890123456789012

1234567890123456789012

1234567890123456789012

1234567890123456789012

1234567

1234567

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1234567

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12345678901234567

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t

AW

Data Valid

t

AH

t

AS

DATA OUT

123456

123456

123456

123456

Data Undefined

t

WP2

t

DS

t

DH

t

HZWE

t

LZWE

WE\

DATA IN

High-Z

NOTES:

1. At any given temperature and voltage condition, t

HZCE

is less than t

LZCE

, and t

HZWE

is less than t

LZWE

.

2. Chip enable and write enable can initiate and terminate a WRITE cycle.

3. Output enable (OE\) is active (LOW).