R8CSLASH13 datasheet(112/224 Pages) RENESAS

112 / 224 page

Rev.1.20

Jan 27, 2006

page 101 of 205

REJ09B0111-0120

R8C/13 Group

12.4 Timer (Timer C)

12.4 Timer C

Timer C is a 16-bit timer. Figure 12.28 shows a block diagram of Timer C. Figure 12.29 shows a block

diagram of CMPs waveform generation unit. Figure 12.30 shows a block diagram of CMP waveform

output unit.

The Timer C has two modes: input capture mode and output compare mode.

Figures 12.31 shows TC, TM0, TM1, and TCC0 registers. Figure 12.32 shows TCC1 and TCOUT regis-

ters.

Figure 12.28 Timer C Block Diagram

Compare 0 interrupt

Transfer signal

fRING128

Capture and compare 0 register

Upper 8 bits

Lower 8 bits

TM0 register

Compare circuit 0

Counter

Upper 8 bits

Lower 8 bits

TC register

Compare register 1

Upper 8 bits

Lower 8 bits

TM1 register

=112

f32

fRING-fast

Compare circuit 1

Timer C interrupt

Timer C counter reset signal

=102

=012

=002

Compare 1 interrupt

INT3/TCIN

TCC11 to TCC10

f32

=012

=102

=112

Edge

detection

TCC07=0

TCC07=1

Digital

filter

INT3 interrupt

TCC12

=002

Other than 002

TCC02 to TCC01

TCC00

TCC01 to TCC02, TCC07: Bits in TCC0 register

TCC10 to TCC12: Bits in TCC1 register

Sampling

clock

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