R8CSLASH20 datasheet(263/501 Pages) RENESAS

263 / 501 page

R8C/20 Group, R8C/21 Group

14. Timers

Rev.2.00 Aug 27, 2008

Page 247 of 458

REJ09B0250-0200

BFC0, BFD0, BFC1, BFD1: Bits in TRDMR Register

Registers TRDGRC0, TRDGRC1, TRDGRD0, and TRDGRD1 are not used in PWM3 mode. To use them as

buffer registers, set bits BFC0, BFC1, BFD0, and BFD1 to 0 (general register) and write a value to the TRDGRC0,

TRDGRC1, TRDGRD0, or TRDGRD1 register. After this, bits BFC0, BFC1, BFD0, and BFD1 may be set to 1

(buffer register).

Table 14.34

TRDGRji Register Functions in PWM3 Mode

Setting

PWM Output Pin

TRDGRA0

−

General register. Set the PWM period.

Setting range: Value set in TRDGRA1 register or above

TRDIOA0

TRDGRA1

General register. Set the changing point (the active level

timing) of PWM output.

Setting range: Value set in TRDGRA0 register or below

TRDGRB0

General register. Set the changing point (the timing that

returns to initial output level) of PWM output.

Setting range: Value set in TRDGRB1 register or above

Value set in TRDGRA0 register or below

TRDIOB0

TRDGRB1

General register. Set the changing point (active level timing) of

PWM output.

Setting range: Value set in TRDGRB0 register or below

TRDGRC0 BFC0 = 0 (These registers are not used in PWM3 mode)

−

TRDGRC1 BFC1 = 0

TRDGRD0 BFD0 = 0

TRDGRD1 BFD1 = 0

TRDGRC0 BFC0 = 1 Buffer register. Set the next PWM period.

(Refer to 14.3.2 Buffer Operation.)

Setting range: Value set in TRDGRC1 register or above

TRDIOA0

TRDGRC1 BFC1 = 1 Buffer register. Set the changing point of next PWM output.

(Refer to 14.3.2 Buffer Operation.)

Setting range: Value set in TRDGRC0 register or below

TRDGRD0 BFD0 = 1 Buffer register. Set the changing point of next PWM output.

(Refer to 14.3.2 Buffer Operation.)

Setting range: Value set in TRDGRD1 register or above,

setting value or below in TRDGRC0 register.

TRDIOB0

TRDGRD1 BFD1 = 1 Buffer register. Set the changing point of next PWM output.

(Refer to 14.3.2 Buffer Operation.)

Setting range: Value set in TRDGRD0 register or below

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