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STM32F0 Datasheet(PDF) 10 Page - STMicroelectronics |
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STM32F0 Datasheet(HTML) 10 Page - STMicroelectronics |
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10 / 71 page ![]() Peripheral migration AN4088 10/71 DocID023072 Rev 3 CEC Yes Yes++ Kernel clock, arbitration lost flag and automatic transmission retry, multi- address config., wake up from stop mode Identical Partial compatibility DMA Yes Yes 1 DMA controller with up to 7 channels NA Full compatibility TIM Yes Yes+ enhancement Identical for same feature Partial compatibility PWR Yes Yes+ No VREF, VDDA can be greater than VDD, 1.8 mode for core. Identical for the same feature Partial compatibility RCC Yes Yes+ New HSI14 dedicated to ADC & HSI48 for the STM32F07x devices PD0 & PD1 => PF0 & PF1 for the HSE Partial compatibility USART Yes Yes+ Choice for independent clock sources, time-out feature, wake-up from stop mode Identical Full compatibility I2C Yes Yes++ Communication events managed by hardware, FM+, wake up from stop mode, digital filter Identical New driver DAC Yes Yes+ DMA underrun interrupt Identical Full compatibility ADC Yes Yes++ Same analog part, but new digital interface Identical Partial compatibility RTC Yes Yes++ sub second precision, digital calibration circuit, time-stamp function for event saving, programmable alarm, and additional auto-wakeup feature on STM32F07x devices Identical for the same feature New driver FLASH Yes Yes+ Option byte modified NA Partial compatibility GPIO Yes Yes++ New peripheral 4 new GPIOs Partial compatibility CAN Yes Yes Same features NA Full compatibility USB FS Device Yes Yes+ Support low-power mode (LPM) and battery charging detection Identical Partial compatibility CRS NA Yes New peripheral NA NA Touch sensing NA Yes New peripheral NA NA COMP NA Yes New peripheral NA NA Table 7. STM32 peripheral compatibility analysis, STM32F1 versus STM32F0 series(1) (continued) Peripheral STM32F1 STM32F0 Compatibility Features Pinout Firmware driver |
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