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R8C/13 Datasheet(PDF) 208 Page - Renesas Technology Corp

Part # R8C/13
Description  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY/R8C/Tiny SERIES
PDF  224 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R8C/13 Datasheet(HTML) 208 Page - Renesas Technology Corp

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R8C/13 Group
19. Usage Notes
Rev.1.20
Jan 27, 2006
page 197 of 205
REJ09B0111-0120
Mode
EW1
Status
During auto-
matic erasing
(erase-sus-
pend function
is enabled)
During auto-
matic erasing
(erase-sus-
pend func-
tion is dis-
abled)
Auto
programming
When maskable interrupt
request is acknowledged
The auto-erasing is sus-
pended and the interrupt pro-
cess is executed. The auto-
erasing can be restarted by
setting the FMR41 bit in the
FMR4 register to “0” (erase
restart) after the interrupt
process completes
The auto-erasing has a prior-
ity and the interrupt request
acknowledgement is waited.
The interrupt process is ex-
ecuted after the auto-erasing
completes
The auto-programming has a
priority and the interrupt re-
quest acknowledgement is
waited. The interrupt process
is executed after the auto-
programming completes
When watchdog timer, oscillation stop detection and
voltage detection interrupt request area acknowledged
Once an interrupt request is acknowledged,
the auto-programming or auto-erasing is forc-
ibly stopped and resets the flash memory. An
interrupt process starts after the fixed period
and the flash memory restarts. Since the block
during the auto-erasing or the address during
the auto-programming is forcibly stopped, the
normal value may not be read. Execute the
auto-erasing again and ensure the auto-eras-
ing is competed normally. Since the watchdog
timer does not stop during the command op-
eration, the interrupt request may be gener-
ated. Reset the watchdog timer regularly using
the erase-suspend function.
Table 19.2 Interrupt in EW1 Mode
NOTES:
1. Do not use the address match interrupt while the command is executed because the vector of the
address match interrupt is allocated on ROM.
2. Do not use the non-maskable interrupt while Block 0 is automatically erased because the fixed bector is
allocated Block 0.



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