Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

Preview PDF HTML

R8C/13 Datasheet(PDF) 143 Page - Renesas Technology Corp

Part # R8C/13
Description  16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY/R8C/Tiny SERIES
PDF  224 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R8C/13 Datasheet(HTML) 143 Page - Renesas Technology Corp

Back Button R8C/13 Datasheet HTML 139Page - Renesas Technology Corp R8C/13 Datasheet HTML 140Page - Renesas Technology Corp R8C/13 Datasheet HTML 141Page - Renesas Technology Corp R8C/13 Datasheet HTML 142Page - Renesas Technology Corp R8C/13 Datasheet HTML 143Page - Renesas Technology Corp R8C/13 Datasheet HTML 144Page - Renesas Technology Corp R8C/13 Datasheet HTML 145Page - Renesas Technology Corp R8C/13 Datasheet HTML 146Page - Renesas Technology Corp R8C/13 Datasheet HTML 147Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 143 / 224 page
background image
Rev.1.20
Jan 27, 2006
page 132 of 205
REJ09B0111-0120
R8C/13 Group
14.3 Sample and Hold
If the SMP bit in the ADCON2 register is set to “1” (with sample-and-hold), the conversion speed per
pin is increased to 28 ØAD cycles for 8-bit resolution or 33 ØAD cycles for 10-bit resolution. Sample-
and-hold is effective in all operation modes. Select whether or not to use the sample-and-hold function
before starting A/D conversion.
When performing the A/D conversion, charge the comparator capacitor inside the microcomputer.
Figure 14.6 shows the A/D conversion timing diagram.
14.3 Sample and Hold mode/14.4 A/D conversion cycles
Figure 14.6 A/D Conversion Timing Diagram
Sampling time
4
φ AD cycle
Comparison
time
Sampling time
2.5
φ AD cycle
Comparison
time
Sampling time
2.5
φ AD cycle
Comparison
time
* Repeat until conversion ends
Conversion time at the 1st bit
at the 2nd bit
Sample & Hold
disabled
Sample & Hold
enabled
Conversion time at the 1st bit
at the 2nd bit
Sampling time
4
φ AD cycle
Comparison
time
Comparison
time
Comparison
time
* Repeat until conversion ends
* Repeat until conversion ends
14.4 A/D conversion cycles
Figure 14.7 shows the A/D conversion cycles.
Figure 14.7 A/D Conversion Cycles
A/D conversion mode
Without sample & hold
Without sample & hold
With sample & hold
With sample & hold
8 bits
10 bits
8 bits
10 bits
Conversion
time
Comparison
time
Comparison
time
End process
Sampling
time
Sampling
time
49
φ AD
59
φ AD
28
φ AD
33
φ AD
2.0
φ AD
2.0
φ AD
2.5
φ AD
2.5
φ AD
2.5
φ AD
2.5
φ AD
2.5
φ AD
2.5
φ AD
8.0
φ AD
8.0
φ AD
4.0
φ AD
4.0
φ AD
4
φ AD
4
φ AD
4
φ AD
4
φ AD
2.5
φ AD
2.5
φ AD
0.0
φ AD
0.0
φ AD
End process
Conversion time at the
2nd bit and the follows
Conversion time
at the 1st bit



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link to Datasheet   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com