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R8C/13 Datasheet(PDF) 128 Page - Renesas Technology Corp |
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R8C/13 Datasheet(HTML) 128 Page - Renesas Technology Corp |
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128 / 224 page  Rev.1.20 Jan 27, 2006 page 117 of 205 REJ09B0111-0120 R8C/13 Group 13.1 Clock Synchronous Serial I/O Mode 13.1.1 Polarity Select Function Figure 13.7 shows the polarity of the transfer clock. Use the CKPOL bit in the U0C0 register to select the transfer clock polarity. (2) When the U0C0 register CKPOL bit = 1 (transmit data output at the edge and the receive data taken in at the falling edge of the transfe D1 D2 D3 D4 D5 D6 D7 D1 D2 D3 D4 D5 D6 D7 D0 D0 TXD0 RXD0 CLK0 (1) When the U0C0 register CKPOL bit = 0 (transmit data output at the edge and the receive data taken in at the rising edge of the transfer D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D0 TXD0 RXD0 CLK0 NOTES: 1. When not transferring, the CLK0 pin outputs a high signal. 2. When not transferring, the CLK0 pin outputs a low signal. (1) (2) Figure 13.7 Transfer Clock Polarity 13.1.2 LSB First/MSB First Select Function Figure 13.8 shows the transfer format. Use the UFORM bit in the U0C0 register to select the transfer format. Figure 13.8 Transfer Format (1) When U0C0 register UFORM bit = 0 (LSB first) D0 D0 D1 D2 D3 D4 D5 D6 D7 D1 D2 D3 D4 D5 D6 D7 TXD0 RXD0 CLK0 (2) When U0C0 register UFORM bit = 1 (MSB first) D6 D5 D4 D3 D2 D1 D0 D7 D7 D6 D5 D4 D3 D2 D1 D0 TXD0 RXD0 CLK0 NOTES: 1.This applies to the case where the CKPOL bit in the U0C0 register is set to “0” (transmit data output at the falling edge and the receive data taken in at the rising edge of the transfer clock). |
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