HD6432138SW datasheet(593/1061 Pages) RENESAS

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Section 17 Host Interface [H8S/2138 Group]

Rev. 4.00 Jun 06, 2006 page 539 of 1004

REJ09B0301-0400

Table 17.8

Fast A20 Gate Output Signals

HA0

Data/Command

Internal CPU

Interrupt Flag (IBF)

GA20

(P81)

Remarks

H'D1 command

1 data*

H'FF command

Q (1)

Turn-on sequence

H'D1 command

0 data*

H'FF command

Q (0)

Turn-off sequence

1/0

H'D1 command

1 data*

Command other than H'FF

and H'D1

Q (1)

Turn-on sequence

(abbreviated form)

1/0

H'D1 command

0 data*

Command other than H'FF

and H'D1

Q (0)

Turn-off sequence

(abbreviated form)

H'D1 command

Command other than H'D1

Cancelled sequence

H'D1 command

Retriggered sequence

H'D1 command

Any data

H'D1 command

1/0

Q(1/0)

Consecutively executed

sequences

Notes: 1. Arbitrary data with bit 1 set to 1.

2. Arbitrary data with bit 1 cleared to 0.

17.3.4

Host Interface Pin Shutdown Function

Host interface output can be placed in the high-impedance state according to the state of the

HIFSD pin. Setting the SDE bit to 1 in the SYSCR2 register enables the HIFSD pin is slave mode.

The HIF constantly monitors the HIFSD pin, and when this pin goes low, places the host interface

output pins (HIRQ1, HIRQ11, HIRQ12, and GA20) in the high-impedance state. At the same

time, the host interface input pins (

CS1, CS2 or ECS2, IOW, IOR, and HA0) are disabled (fixed at

the high input state internally) regardless of the pin states, and the signals of the multiplexed

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