R8CSLASH20 datasheet(274/501 Pages) RENESAS

274 / 501 page

R8C/20 Group, R8C/21 Group

14. Timers

Rev.2.00 Aug 27, 2008

Page 258 of 458

REJ09B0250-0200

14.4.1

Output Compare Mode

The output compare mode is to count the internal count source divided-by-2 using the 4-bit or 8-bit counter and

detect the compare value match with the 8-bit counter.

Figure 14.114 shows the Block Diagram of Output Compare Mode and Table 14.37 lists the Output Compare

Mode Specifications. Figures 14.115 to 14.119 show the Registers Associated with Output Compare Mode and

Figure 14.120 shows the Operation in Output Compare Mode.

Figure 14.114 Block Diagram of Output Compare Mode

TOENA

TREO pin

f32

4-bit

counter

8-bit

counter

TRESEC

Comparison

circuit

TREMIN

1/2

RCS2 = 1

RCS2 = 0

COMIE

Timer RE interrupt

Match

signal

= 00b

= 01b

= 10b

RCS1 to RCS0

RCS6 to RCS5

= 00b

= 01b

= 10b

= 11b

TOENA, TRERST: Bits in TRECR1 register

COMIE: Bit in TRECR2 register

RCS0 to RCS2, RCS5 to RCS6: Bits in TRECSR register

Reset

TRERST bit

Data bus

R8C/20 Datasheet(PDF) 274 Page - Renesas Technology Corp

R8C/20 Datasheet(HTML) 274 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL