R8CSLASH20 datasheet(449/501 Pages) RENESAS

449 / 501 page

R8C/20 Group, R8C/21 Group

21. Usage Notes

Rev.2.00 Aug 27, 2008

Page 433 of 458

REJ09B0250-0200

21.3.2

Notes on Timer RB

• Timer RB stops counting after reset. Set the value to timer RB and timer RB prescaler before the count

starts.

• Even if the prescaler and timer RB is read out in 16-bit units, these registers are read by 1 byte in the MCU.

Consequently, the timer value may be updated during the period these two registers are being read.

• In programmable one-shot generation mode and programmable wait one-shot generation mode, when

setting the TSTART bit in the TRBCR register to 0, 0 (stops counting) or setting the TOSSP bit in the

TRBOCR register to 1 (stops one-shot), the timer reloads the value of reload register and stops. Therefore,

read the timer count value in programmable one-shot generation mode and programmable wait one-shot

generation mode before the timer stops.

• The TCSTF bit retains 0 (count stops) for 1 to 2 cycles of the count source after setting the TSTART bit to

1 (count starts) while the count stops.

During this time, do not access registers associated with timer RB(1) other than the TCSTF bit.

The TCSTF bit retains 1 for 1 to 2 cycles of the count source after setting the TSTART bit to 0 (count

stops) while the count is performing. Timer RB counting is stopped when the TCSTF bit is set to 0.

During this time, do not access registers associated with timer RB(1) other than the TCSTF bit.

NOTE:

1. Registers associated with timer RB: TRBCR, TRBOCR, TRBIOC, TRBMR, TRBPRE, TRBSC, TRBPR

• If the TSTOP bit in the TRBCR register is set to 1 during timer operation, timer RB stops immediately.

• If 1 is written to the TOSST or TOSSP bit in the TRBOCR register, the value of the TOSSTF bit changes

after one or two cycles of the count source have elapsed. If the TOSSP bit is written to 1 during the period

between when the TOSST bit is written to 1 and when the TOSSTF bit is set to 1, the TOSSTF bit may be

set to either 0 or 1 depending on the content state. Likewise, if the TOSST bit is written to 1 during the

period between when the TOSSP bit is written to 1 and when the TOSSTF bit is set to 0, the TOSSTF bit

may be set to either 0 or 1.

21.3.2.1

Timer mode

The following workaround should be performed in timer mode.

To write to registers TRBPRE and TRBPR during count operation (TCSTF bit is set to 1), note the following

points:

• When the TRBPRE register is written continuously, allow three or more cycles of the count source for each

write interval.

• When the TRBPR register is written continuously, allow three or more cycles of the prescaler underflow

for each write interval.

R8C/20 Datasheet(PDF) 449 Page - Renesas Technology Corp