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CC1000-RTR2 Datasheet(PDF) 25 Page - Texas Instruments

Part # CC1000-RTR2
Description  Single Chip Very Low Power RF Transceiver
PDF  55 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CC1000-RTR2 Datasheet(HTML) 25 Page - Texas Instruments

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CC1000
SWRS048A
Page 25 of 55
16. VCO
Only one external inductor (L101) is
required for the VCO. The inductor will
determine the operating frequency range
of the circuit. It is important to place the
inductor as close to the pins as possible in
order to reduce stray inductance. It is
recommended to use a high Q, low
tolerance inductor for best performance.
Typical tuning range for the integrated
varactor is 20-25%.
Component values for various frequencies
are given in Table 1. Component values
for other frequencies can be found using
the SmartRF
® Studio software.
17. VCO and PLL self-calibration
To
compensate
for
supply
voltage,
temperature and process variations the
VCO and PLL must be calibrated. The
calibration is done automatically and sets
maximum VCO tuning range and optimum
charge pump current for PLL stability.
After setting up the device at the operating
frequency, the self-calibration can be
initiated by setting the CAL_START bit.
The calibration result is stored internally in
the chip, and is valid as long as power is
not turned off. If large supply voltage
variations
(more
than
0.5
V)
or
temperature variations (more than 40
degrees) occur after calibration, a new
calibration should be performed.
The self-calibration is controlled through
the
CAL
register
(see
configuration
registers
description
p.
39).
The
CAL_COMPLETE bit indicates complete
calibration. The user can poll this bit, or
simply wait for 34 ms (calibration wait time
when CAL_WAIT = 1). The wait time is
proportional to the internal PLL reference
frequency. The lowest permitted reference
frequency (1 MHz) gives 34 ms wait time,
which is therefore the worst case.
Reference
frequency [MHz]
Calibration time
[ms]
2.4
14
2.0
17
1.5
23
1.0
34
The CAL_COMPLETE bit can also be
monitored at the CHP_OUT (LOCK) pin
(configured by LOCK_SELECT[3:0]) and
used
as
an
interrupt
input
to
the
microcontroller.
The CAL_START bit must be set to 0 by
the microcontroller after the calibration is
done.
There are separate calibration values for
the two frequency registers. If the two
frequencies, A and B, differ more than 1
MHz, or different VCO currents are used
(VCO_CURRENT[3:0] in the CURRENT
register) the calibration should be done
separately. When using a 10.7 MHz
external
IF
the
LO
is
10.7
MHz
below/above
the
transmit
frequency,
hence separate calibration must be done.
The CAL_DUAL bit in the CAL register
controls dual or separate calibration.
The single calibration algorithm, using
separate
calibration
for
RX
and
TX
frequency, is illustrated in Figure 16.
In Figure 17 the dual calibration algorithm
is shown for two RX frequencies. It could
also be used for two TX frequencies, or
even for one RX and one TX frequency if
the same VCO current is used.
In multi-channel and frequency hopping
applications the PLL calibration values
may be read and stored for later use. By
reading
back
calibration
values
and
frequency change can be done without
doing a re-calibration which could take up
to 34 ms. The calibration value is stored in
the TEST0 and TEST2 registers after a
calibration is completed. Note that when
using single calibration, calibration values
are
stored
separately
for
frequency
registers A and B. This means that the
TEST0 and TEST2 registers will contain
calibration
settings
for
the
currently
selected frequency register (selected by
F_REG
in
the
MAIN
register).
The
calibration value can later be written into
TEST5
and
TEST
6
to
bypass
the
calibration.
Note
that
you
must
set
VCO_OVERRIDE=1
in
TEST5
and
CHP_OVERRIDE=1
in
the
TEST6
register.



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