CC1000-RTR2 datasheet(19/55 Pages) TI

19 / 55 page

CC1000

SWRS048A

Page 19 of 55

12. Bit synchroniser and data decision

Sampler

Average

filter

Data

filter

Decimator

Frequency

detector

Data slicer

comparator

Figure 11. Demodulator block diagram

A block diagram of the digital demodulator

is shown in Figure 11. The IF signal is

sampled and its instantaneous frequency

is detected. The result is decimated and

filtered. In the data slicer the data filter

output is compared to the average filter

output to generate the data output.

The averaging filter is used to find the

average value of the incoming data. While

the

averaging

filter

running

and

acquiring samples, it is important that the

number of high and low bits received is

equal

(e.g.

Manchester

code

balanced preamble).

Therefore all modes, also synchronous

NRZ

mode,

need

balanced

preamble for the internal data slicer to

acquire correct comparison level from the

averaging filter. The suggested preamble

is a ‘010101…’ bit pattern. The same bit

pattern should also be used in Manchester

mode,

giving

‘011001100110…chip

pattern. This is necessary for the bit

synchronizer to synchronize correctly.

The averaging filter must be locked before

any NRZ data can be received. If the

averaging

filter

locked

(MODEM1.LOCK_AVG_MODE=’1’),

the

acquired value will be kept also after

Power Down or Transmit mode. After a

modem

reset

(MODEM1.MODEM_RESET_N),

main reset (using any of the standard

reset sources), the averaging filter is reset.

In a polled receiver system the automatic

locking can be used. This is illustrated in

Figure 12. If the receiver is operated

continuously

and

searching

for

preamble, the averaging filter should be

locked manually as soon as the preamble

is detected. This is shown in Figure 13. If

the data is Manchester coded there is no

need

lock

the

averaging

filter

(MODEM1.LOCK_AVG_IN=’0’), as shown

in Figure 14.

The minimum length of the preamble

depends on the acquisition mode selected

and the settling time. Table 4 gives the

minimum recommended number of chips

for the preamble in NRZ and UART

modes. In this context ‘chips’ refer to the

data coding. Using Manchester coding

every bit consists of two ‘chips’. For

Manchester

mode

the

minimum

recommended number of chips is shown

in Table 5.

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