CC1000-RTR2 datasheet(9/55 Pages) TI

9 / 55 page

CC1000

SWRS048A

Page 9 of 55

5. Circuit Description

Figure 1. Simplified block diagram of the

CC1000

A simplified block diagram of

CC1000 is

shown in Figure 1. Only signal pins are

shown.

In receive mode

CC1000 is configured as a

traditional superheterodyne receiver. The

RF input signal is amplified by the low-

noise amplifier (LNA) and converted down

to the intermediate frequency (IF) by the

mixer

(MIXER).

the

intermediate

frequency

stage

(IF

STAGE)

this

downconverted signal is amplified and

filtered

before

being

fed

the

demodulator (DEMOD). As an option a

RSSI signal, or the IF signal after the

mixer is available at the RSSI/IF pin. After

demodulation

CC1000 outputs the digital

demodulated

data

the

DIO.

Synchronisation is done on-chip providing

data clock at DCLK.

In transmit mode the voltage controlled

oscillator

(VCO)

output

signal is fed

directly to the power amplifier (PA). The

RF output is frequency shift keyed (FSK)

by the digital bit stream fed to the pin DIO.

The internal T/R switch circuitry makes the

antenna interface and matching very easy.

The frequency synthesiser generates the

local oscillator signal which is fed to the

MIXER in receive mode and to the PA in

transmit mode. The frequency synthesiser

consists of a crystal oscillator (XOSC),

phase

detector

(PD),

charge

pump

(CHARGE PUMP), VCO, and frequency

dividers (/R and /N). An external crystal

must be connected to XOSC, and only an

external inductor is required for the VCO.

The

3-wire

digital

serial

interface

(CONTROL) is used for configuration.

PDATA, PCLK, PALE

LNA

DEMOD

VCO

OSC

MIXER

CHARGE

PUMP

RF_IN

DIO

CHP_OUT

IF STAGE

RF_OUT

RSSI/IF

CONTROL

XOSC_Q2

XOSC_Q1

DCLK

LPF

BIAS

R_BIAS