LIS302DL

Register description

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7.4

CTRL_REG3 [Interrupt CTRL register] (22h)

7.5

HP_FILTER_RESET (23h)

Dummy register. Reading at this address zeroes instantaneously the content of the internal

high pass-filter. Read data is not significant.

IHL

PP_OD

I2CFG2

I2CFG1

I2CFG0

I1CFG2

I1CFG1

I1CFG0

IHL

Interrupt active high, low. Default value 0.

(0: active high; 1: active low)

PP_OD

Push-pull/Open Drain selection on interrupt pad. Default value 0.

(0: push-pull; 1: open drain)

I2CFG2

I2CFG1

I2CFG0

Data Signal on Int2 pad control bits. Default value 000.

(see table below)

I1CFG2

I1CFG1

I1CFG0

Data Signal on Int1 pad control bits. Default value 000.

(see table below)

I1(2)_CFG2

I1(2)_CFG1

I1(2)_CFG0

Int1(2) Pad

0

0

0

GND

001

FF_WU_1

010

FF_WU_2

0

1

1

FF_WU_1 or FF_WU_2

1

0

0

Dataready

111

Not Used