LIS302DL

Application hints

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Application hints

Figure 3.

LIS302DL electrical connection

The device core is supplied through Vdd line while the I/O pads are supplied through

Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10

μF Al) should be

placed as near as possible to the pin 6 of the device (common design practice).

All the voltage and ground supplies must be present at the same time to have proper

behavior of the IC (refer to Fig. 3). It is possible to remove Vdd maintaining Vdd_IO without

blocking the communication busses, in this condition the measurement chain is powered off.

The functionality of the device and the measured acceleration data is selectable and

SDO must be left floating.

The functions, the threshold an the timing of the two interrupt pins (INT 1 and INT 2) can be

4.1

Soldering information

The LGA package is compliant with the ECOPACK, RoHS and “green” standard. It is

qualified for soldering heat resistance according to JEDEC J-STD-020C. Pin #1 indicator is

electrically connected to pin 1. Leave pin 1 indicator unconnected during soldering. Land

6

8

13

1

Top VIEW

10uF

Vdd

100nF

GND

Vdd_IO

Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO

1

13

8

6

TOP VIEW

X

Z

Y

DIRECTION OF THE

DETECTABLE

ACCELERATIONS