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STA320 Datasheet(PDF) 28 Page - STMicroelectronics |
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STA320 Datasheet(HTML) 28 Page - STMicroelectronics |
28 / 37 page STA320 28/37 5.14.10Coefficient a1 Data Register Bits 7..0 5.14.11Coefficient a2 Data Register Bits 23..16 5.14.12Coefficient a2 Data Register Bits 15..8 5.14.13Coefficient a2 Data Register Bits 7..0 5.14.14Coefficient b0 Data Register Bits 23..16 5.14.15Coefficient b0 Data Register Bits 15..8 5.14.16Coefficient b0 Data Register Bits 7..0 5.14.17Coefficient Write Control Register Coefficients for user-defined EQ, Mixing, Scaling, and Bass Management are handled internally in the STA320 via RAM. Access to this RAM is available to the user via an I2C register interface. A collection of I2C registers are dedicated to this function. One contains a coefficient base address, five sets of three store the values of the 24-bit coefficients to be written or that were read, and one contains bits used to control the write/read of the coefficient(s) to/from RAM. The following are instructions for reading and writing coefficients. D7 D6 D5 D4 D3 D2 D1 D0 C3B7 C3B6 C3B5 C3B4 C3B3 C3B2 C3B1 C3B0 0 0 0 000 00 D7 D6 D5 D4 D3 D2 D1 D0 C4B23 C4B22 C4B21 C4B20 C4B19 C4B18 C4B17 C4B16 000000 00 D7 D6 D5 D4 D3 D2 D1 D0 C4B15 C4B14 C4B13 C4B12 C4B11 C4B10 C4B9 C4B8 00 000 0 0 0 D7 D6 D5 D4 D3 D2 D1 D0 C4B7 C4B6 C4B5 C4B4 C4B3 C4B2 C4B1 C4B0 0 0 0 000 00 D7 D6 D5 D4 D3 D2 D1 D0 C5B23 C5B22 C5B21 C5B20 C5B19 C5B18 C5B17 C5B16 000000 00 D7 D6 D5 D4 D3 D2 D1 D0 C5B15 C5B14 C5B13 C5B12 C5B11 C5B10 C5B9 C5B8 00 000 0 0 0 D7 D6 D5 D4 D3 D2 D1 D0 C5B7 C5B6 C5B5 C5B4 C5B3 C5B2 C5B1 C5B0 0 0 0 000 00 D7 D6 D5 D4 D3 D2 D1 D0 RA R1 WA W1 00 00 |
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