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SW4STM32C Datasheet(PDF) 74 Page - STMicroelectronics

Part # SW4STM32C
Description  STM32 microcontroller debug toolbox
PDF  99 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SW4STM32C Datasheet(HTML) 74 Page - STMicroelectronics

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Debug through hardware exploration
AN4989
74/99
DocID030181 Rev 2
If the frequency of the signal under observation exceeds the GPIO capability (e.g. 216 MHz
Sysclock on F7 while GPIO maximum frequency is 100 MHz), use a divider to produce a
suitable signal.
The default value in RCC HAL function is the highest (which is good).
In case of a STM32CubeMX generated project, be aware that default value applied in
generated MX_GPIO_init() function (executed after MCO config) is the lowest.
In case the output clock is higher than 1 MHz, it is recommended to change this.
A too low OSPEED setting can be suspected in case no signal or very noisy/flatten signal
(small amplitude).
A too high setting can be suspected if a signal with a long and high amplitude dumping
oscillation is observed (overshoot / undershoot).
8.2.3
STM32 Series differences
STM32L4 Series also provides an LSCO (Low Speed Clock Output) on PA2 in order to
output LSE or LSI, same as MCO, but with benefit to be still available during stop and
standby mode.
Refer to section 6.2.15 Clock-out capability of STMicroelectronics reference manual
STM32L4x5 and STM32L4x6 advanced ARM®-based 32-bit MCUs (RM035) for details.
HAL Function to call is:
void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource)
in stm32l4xx_hal_rcc_ex.c/.h
Note:
LSCO is conflicting with UART2 TX (PA2). On Nucleo-64 board, the use of the LSCO board
use and the use of the ST-LINK VCP are mutually exclusive.
SB63 must be set in order to get the LSCO signal available on Morpho and Arduino™
connectors.
Refer to the board user manual for details.
STM32F4 and STM32F7 Series devices provide two different MCO outputs given choice of
four clocks each as shown in Figure 55. Refer also to Appendix D: Cortex®-M debug
capabilities reminder on page 97.



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