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EM357-RTR Datasheet(PDF) 81 Page - Silicon Laboratories |
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EM357-RTR Datasheet(HTML) 81 Page - Silicon Laboratories |
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81 / 241 page  81 Rev 1.3 SC1_SPISTAT: Address: 0x4000C840 Reset: 0x0 SC2_SPISTAT: Address: 0x4000C040 Reset: 0x0 Register 8.7. SCx_SPISTAT SC1_SPISTAT: SPI Status Register SC2_SPISTAT: SPI Status Register Bit 31 30 29 28 27 26 25 24 Name 0 0 0 0 0 0 0 0 Bit 23 22 21 20 19 18 17 16 Name 0 0 0 0 0 0 0 0 Bit 15 14 13 12 11 10 9 8 Name 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Name 0 0 0 0 SC_SPITXIDLE SC_SPITXFREE SC_SPIRXVAL SC_SPIRXOVF Bitname Bitfield Access Description SC_SPITXIDLE [3] R This bit is set when both the transmit FIFO and the transmit serializer are empty. SC_SPITXFREE [2] R This bit is set when the transmit FIFO has space to accept at least one byte. SC_SPIRXVAL [1] R This bit is set when the receive FIFO contains at least one byte. SC_SPIRXOVF [0] R This bit is set if a byte is received when the receive FIFO is full. This bit is cleared by reading the data register. |
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